Production Data
WM8737L
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R5 (05h)
MONOMIX[1:0]
00
00: Stereo
8:7
ADC Control
01: Analogue Mono-mix
10: Digital Mono-mix
11: Reserved
R5 (05h)
MONOUT
0
Analogue mono-mix format control
1
ADC Control
0: Left ADC data appears on Left
Channel output and Right ADC data
appears on Right Channel Output.
1: Left ADC data appears on both Left
and Right channel outputs.
Table 5 Mono Mixing Control
Note: In stereo mode (R5) 00, Bit 1 must always be set to 0.
MICROPHONE BIAS
The MICBIAS output provides a low noise reference voltage suitable for biasing electret type
microphones and the associated external resistor biasing network. The output voltage is derived from
VREF and is programmable in three steps from 0.75 AVDD to 1.2 AVDD, as shown below. Supply
voltage MVDD must be at least 170mV higher than the desired MICBIAS voltage to ensure correct
MICBIAS operation.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R6 (06h)
MICBIAS[1:0]
00
Microphone Bias Control
1:0
Power
Management
00: MICBIAS OFF (powered down,
high-impedance output)
01: VMICBIAS = 0.75 AVDD
10: VMICBIAS = 0.9 AVDD
11: VMICBIAS = 1.2 AVDD
Table 6 MICBIAS Control
The internal MICBIAS circuitry is shown below. MVDD is a separate power supply pin used only for
MICBIAS and the microphone preamplifiers. When MICBIAS < AVDD, then MVDD can be tied to
AVDD. However, when MICBIAS = 1.2 AVDD, then MVDD must be large enough to generate this
output voltage, i.e. it must be higher than AVDD.
Note: The maximum voltage for MVDD of 3.6V must be observed.
MVDD
VREF
MICBIAS
internal
resistor
AGND
Figure 6 Microphone Bias Schematic
Note that the maximum source current capability for MICBIAS is 3mA. The external biasing resistors
therefore must be large enough to limit the MICBIAS current to 3mA. Please refer to the “Applications
Information” section for recommended external components.
PD, Rev 4.4, January 2012
17
w