WM8731 / WM8731L
Production Data
The gain between the line inputs and the ADC is logarithmically adjustable from +12dB to –34.5dB in
1.5dB steps under software control. The ADC Full Scale input is 1.0V rms at AVDD = 3.3 volts. Any
voltage greater than full scale will possibly overload the ADC and cause distortion. Note that the full
scale input tracks directly with AVDD. The gain is independently adjustable on both Right and Left
Line Inputs. However, by setting the INBOTH bit whilst programming the volume control, both
channels are simultaneously updated with the same value. Use of INBOTH reduces the required
number of software writes required. The line inputs to the ADC can be muted in the analogue domain
under software control. The software control registers are shown Table 3. Note that the Line Input
Mute only mutes the input to the ADC, this will still allow the Line Input signal to pass to the line
output in Bypass Mode.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
0000000
4:0
LINVOL[4:0]
10111
( 0dB )
Left Channel Line Input Volume
Control
Left Line In
11111 = +12dB . . 1.5dB steps down
to 00000 = -34.5dB
7
8
LINMUTE
1
0
Left Channel Line Input Mute to ADC
1 = Enable Mute
0 = Disable Mute
LRINBOTH
Left to Right Channel Line Input
Volume and Mute Data Load Control
1 = Enable Simultaneous Load of
LINVOL[4:0] and LINMUTE to
RINVOL[4:0] and RINMUTE
0 = Disable Simultaneous Load
0000001
4:0
7
RINVOL[4:0]
RINMUTE
10111
( 0dB )
Right Channel Line Input Volume
Control
Right Line In
11111 = +12dB . .1.5dB steps down
to 00000 = -34.5dB
1
0
Right Channel Line Input Mute to
ADC
1 = Enable Mute
0 = Disable Mute
8
RLINBOTH
Right to Left Channel Line Input
Volume and Mute Data Load Control
1 = Enable Simultaneous Load of
RINVOL[4:0] and RINMUTE to
LINVOL[4:0] and LINMUTE
0 = Disable Simultaneous Load
Table 3 Line Input Software Control
The line inputs are biased internally through the operational amplifier to VMID. Whenever the line
inputs are muted or the device placed into standby mode, the line inputs are kept biased to VMID
using special anti-thump circuitry. This reduces any audible clicks that may otherwise be heard when
re-activating the inputs.
The external components required to complete the line input application is shown in the Figure 11.
PD, Rev 4.9, October 2012
22
w