WM8731 / WM8731L
Production Data
AVDD
VMID
CONTROL INTERFACE
WM8731
HPVDD
Bypass, Reg 08h
MUTE
HPGND
AGND
ATTEN/
MUTE
+6 to -73dB
1 dB Steps, Reg 06h
SIDEATT,
Reg 08h
H/P
DRIVER
VOL/
MUTE
RLINEIN Mute
Reg 02h
MICBIAS
RLINEIN
RHPOUT
INSEL, Reg 08h
VOL
MUTE
MUTE
ADC
ADC
MUX
DAC
DAC
MUTE
+12 to -34.5dB, 1.5dB Steps,
Reg 02h
SIDETONE
Reg 08h
DACMUTE
Reg 0Ah
ROUT
LOUT
0dB/
20dB
DIGITAL
FILTERS
MICIN
DACMUTE
Reg 0Ah
SIDETONE
Reg 08h
MIC BOOST Reg 08h
MUTE
MUTE
MUX
MUTE
VOL
LLINEIN
VOL/
MUTE
H/P
DRIVER
LLINEIN Mute
Reg 00h
INSEL, Reg 08h
LHPOUT
+12 to -34.5dB, 1.5dB Steps,
Reg 00h
SIDEATT,
Reg 08h
+6 to -73dB
1 dB Steps, Reg 04h
ATTEN/
MUTE
OSCPD
Reg 0Ch
MUTE
CLKODIV2, Reg 10h
CLKOUT
DIVIDER
CLKIN
DIVIDER
Bypass, Reg 08h
OSC
DIGTAL AUDIO INTERFACE
(Div x1, x2)
(Div x1, x2)
CLKIDIV2, Reg 10h
CLKOUTPD, Reg 0Ch
Figure 9 Functional Block Diagram
AUDIO SIGNAL PATH
LINE INPUTS
The WM8731/L provides Left and Right channel line inputs (RLINEIN and LLINEIN). The inputs are
high impedance and low capacitance, thus ideally suited to receiving line level signals from external
hi-fi or audio equipment.
Both line inputs include independent programmable volume level adjustments and ADC input mute.
The scheme is illustrated in Figure 10. Passive RF and active Anti-Alias filters are also incorporated
within the line inputs. These prevent high frequencies aliasing into the audio band or otherwise
degrading performance.
LINEIN
12.5k
To
ADC
VMID
Figure 10 Line Input Schematic
PD, Rev 4.9, October 2012
21
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