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WM8728 参数 Datasheet PDF下载

WM8728图片预览
型号: WM8728
PDF下载: 下载PDF文件 查看货源
内容描述: 24位, 192kHz的立体声DAC,具有音量控制和DSD支持 [24-bit, 192kHz Stereo DAC with Volume Control and DSD Support]
分类和应用:
文件页数/大小: 28 页 / 267 K
品牌: WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
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WM8728  
Product Preview  
Figure 12 Application and Release of Soft Mute  
The MUTEB pin is an input to select mute or not mute. MUTEB is active low; taking the pin low  
causes the filters to soft mute, ramping down the audio signal over a few milliseconds. Taking  
MUTEB high again allows data into the filter.  
The automute function detects a series of ZERO value audio samples of 1024 samples long  
being applied to both channels. After such an event, a latch is set whose output (AUTOMUTED)  
is wire ORed through a 10kohm resistor to the MUTEB pin. Thus if the MUTEB pin is not being  
driven, the automute function will assert mute.  
If MUTEB is tied high, AUTOMUTED is overridden and will not mute unless the IZD register bit is  
set. If MUTEB is driven from a bi-directional source, then both MUTE and automute functions are  
available. If MUTEB is not driven, AUTOMUTED appears as a weak output (10kOhm-source  
impedance) so can be used to drive external mute circuits. AUTOMUTED will be removed as  
soon as any channel receives a non-ZERO input.  
A diagram showing how the various Mute modes interact is shown below Figure 13.  
IZD (Register Bit)  
AUTOMUTED  
(Internal Signal)  
10k  
SOFTMUTE  
(Internal  
Signal)  
MUTEB  
PIN  
MUT (Register Bit)  
Figure 13 Selection Logic for MUTE Modes  
INPUT FORMAT SELECTION  
In hardware mode, LATI2S (pin 20) and CSBIWL (pin 15) become input controls for selection of  
input data format type and input data word length.  
LATI2S  
CSBIWL  
INPUT DATA MODE  
24-bit right justified  
0
0
1
0
1
0
20-bit right justified  
16-bit I2S  
24-bit I2S  
1
1
Table 3 Input Format Selection  
Note:  
In 24 bit I2S mode, any width of 24 bits or less is supported provided that LRCIN is high for a  
minimum of 24 BCKINs and low for a minimum of 24 BCKINs. If exactly 32 BCKINs occur in one  
LRCIN (16 high, 16 low) the chip will auto detect and run a 16 bit data mode.  
DE-EMPHASIS CONTROL  
In hardware mode, SDIDEM (pin 18) becomes an input control for selection of de-emphasis  
filtering to be applied.  
SDIDEM  
DE-EMPHASIS  
0
Off  
On  
1
Table 4 De-emphasis Control  
WOLFSON MICROELECTRONICS LTD  
PP Rev 1.2 April 2001  
16  
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