WM8711L
Production Data
PIN DESCRIPTION
28 LEAD
QFN
5
NAME
TYPE
DESCRIPTION
Digital Buffers VDD
DBVDD
CLKOUT
BCLK
Supply
Digital Output
Digital Input/Output
Digital Input
Digital Input/Output
NC
Buffered Clock Output
6
Digital Audio Bit Clock, Pull Down (see Note 1)
DAC Digital Audio Data Input
7
8
DACDAT
DACLRC
DAC Sample Rate Left/Right Clock, Pull Down (see Note 1)
No Connection
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
No Connection
NC
Headphone VDD
HPVDD
LHPOUT
RHPOUT
HPGND
LOUT
Supply
Left Channel Headphone Output
Right Channel Headphone Output
Headphone GND
Analogue Output
Analogue Output
Ground
Left Channel Line Output
Right Channel Line Output
Analogue VDD
Analogue Output
Analogue Output
Supply
ROUT
AVDD
Analogue GND
AGND
Ground
Mid-rail reference decoupling point
No Connection
VMID
Analogue Output
NC
No Connection
NC
Right Channel Line Input (AC coupled)
Left Channel Line Input (AC coupled)
Control Interface Selection, Pull up (see Note 1)
RLINEIN
LLINEIN
MODE
CSB
Analogue Input
Analogue Input
Digital Input
Digital Input
3-Wire MPU Chip Select/ 2-Wire MPU interface address
selection, active low, Pull up (see Note 1)
3-Wire MPU Data Input / 2-Wire MPU Data Input
3-Wire MPU Clock Input / 2-Wire MPU Clock Input
Crystal Input or Master Clock Input (MCLK)
Crystal Output
27
28
1
SDIN
SCLK
Digital Input/Output
Digital Input
Digital Input
Digital Output
Supply
XTI/MCLK
XTO
2
Digital Core VDD
3
DCVDD
DGND
Digital GND
4
Ground
Note:
1. Pull Up/Down only present when Control Register Interface ACTIVE=0 to conserve power.
2. It is recommended that the QFN ground paddle is connected to analogue ground on the application PCB.
PD, Rev 4.5, August 2011
w
4
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
