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WM8591
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R14 (0Eh)
0001110
7:0
LAG[7:0]
11001111
(0dB)
Attenuation Data for Left Channel ADC Gain in 0.5dB Steps:
00000000 : digital mute
00000001 : -103dB
Attenuation
ADCL
………..
11001111 : 0dB
…………
11111110 : +23.5dB
11111111 : +24dB
8
ZCLA
0
Left ADC Zero Cross Enable:
0: Zero cross disabled
1: Zero cross enabled
Attenuation Data for Right Channel ADC Gain in 0.5dB Steps:
00000000 : digital mute
00000001 : -103dB
R15 (0Fh)
0001111
7:0
RAG[7:0]
11001111
(0dB)
Attenuation
ADCR
………..
11001111 : 0dB
…………
11111110 : +23.5dB
11111111 : +24dB
8
ZCRA
0
Right ADC Zero Cross Enable:
0: Zero cross disabled
1: Zero cross enabled
Limiter Threshold/ALC Target Level in 1.5dB Steps:
0000: -22.5dB FS
R16 (10h)
0010000
3:0
LCT[3:0]
1110
(-1.5dB)
ALC Control 1
0001: -21dB FS
…
1101: -3dB FS
1110: -1.5dB FS
1111: 0dB FS
6:4
MAXGAIN[2:0]
111 (+24dB) Set Maximum Gain of PGA:
111 : +24dB
110 : +20dB
….(-4dB steps)
010 : +4dB
001 : 0dB
000 : 0dB
8:7
LCSEL[1:0]
11
LC Function Select
00 = Disabled
(Stereo)
01 = Right channel only
10 = Left channel only
11 = Stereo
R17 (11h)
0010001
7
8
ALCZC
1
ALC Uses Zero Cross Detection Circuit.
(zero cross on)
1
ALC Control 2
LCMODE
ALC/Limiter Select:
0 = ALC Mode
1 = Limiter Mode
PP Rev 1.0 May 2005
41
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
