Production Data
WM8580
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
Maximum Audio sample word length
R35
SPDTXCHAN 5
23h
0
MAXWL
1
0 = 20 bits
1 = 24 bits
3:1
TXWL[2:0]
101
Audio Sample Word Length.
000 = Word Length Not Indicated
TXWL[2:0]
MAXWL==1
MAXWL==
0
001
010
100
101
110
20 bits
22 bits
23 bits
24 bits
21 bits
16 bits
18 bits
19 bits
20 bits
17 bits
All other combinations reserved
7:4
0
ORGSAMP
[3:0]
0000
1
Original Sampling Frequency. See S/PDIF specification for details.
0000 = original sampling frequency not indicated
Selects the input circuit type for the SPDIFIN1 input
0 = CMOS-compatible input
R36
SPDMODE
24h
SPDIFIN1MODE
1 = Comparator input. Compatible with 500mVpp AC coupled
consumer S/PDIF input signals as defined in IEC-60958-3.
2:1
RXINSEL[1:0]
00
S/PDIF Receiver input mux select. Note that the general purpose
inputs must be configured using GPOxOP to be either CMOS or
comparator inputs if selected by RXINSEL.
00 = SPDIFIN1
01 = SPDIFIN2 (MFP3)
10 = SPDIFIN3 (MFP4)
11 = SPDIFIN4 (MFP5)
6
WL_MASK
MASK[8:0]
0
S/PDIF Receiver Word Length Truncation Mask
0 = disabled, data word is truncated as described in Table 60.
1 = enabled, data word is not truncated.
R37
INTMASK
25h
8:0
000000000
When a flag is masked, it does not update the Error Register or
contribute to the interrupt pulse.
0 = unmask, 1 = mask.
MASK[0] = mask control for UPD_UNLOCK
MASK[1] = mask control for INT_INVALID
MASK[2] = mask control for INT_CSUD
MASK[3] = mask control for INT_TRANS_ERR
MASK[4] = mask control for UPD_AUDIO_N
MASK[5] = mask control for UPD_PCM_N
MASK[6] = mask control for UPD_CPY_N
MASK[7] = mask control for UPD_DEEMPH
MASK[8] = mask control for UPD_REC_FREQ
PD Rev 4.3 August 2007
85
w
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
