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WM8352 参数 Datasheet PDF下载

WM8352图片预览
型号: WM8352
PDF下载: 下载PDF文件 查看货源
内容描述: 欧胜音频Plusa ? ¢立体声CODEC与电源管理 [Wolfson AudioPlus™ Stereo CODEC with Power Management]
分类和应用:
文件页数/大小: 336 页 / 2353 K
品牌: WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
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Production Data  
WM8352  
REGISTER  
ADDRESS  
BIT  
LABEL  
DEFAULT  
DESCRIPTION  
REFER TO  
R225 (E1h)  
DCDC/LDO  
status  
15  
LS_STS  
0
Readback of the raw signal value.  
Allow direct control of this signal's input to the  
debounce logic when the ANALOG_OVRDE bit is set  
to 1.  
Reset by state machine.  
11  
10  
9
LDO4_STS  
LDO3_STS  
LDO2_STS  
LDO1_STS  
DC6_STS  
DC5_STS  
DC4_STS  
DC3_STS  
DC2_STS  
DC1_STS  
0
0
0
0
0
0
0
0
0
0
Readback of the raw signal value.  
Allow direct control of this signal's input to the  
debounce logic when the ANALOG_OVRDE bit is set  
to 1.  
Reset by state machine.  
Readback of the raw signal value.  
Allow direct control of this signal's input to the  
debounce logic when the ANALOG_OVRDE bit is set  
to 1.  
Reset by state machine.  
Readback of the raw signal value.  
Allow direct control of this signal's input to the  
debounce logic when the ANALOG_OVRDE bit is set  
to 1.  
Reset by state machine.  
8
Readback of the raw signal value.  
Allow direct control of this signal's input to the  
debounce logic when the ANALOG_OVRDE bit is set  
to 1.  
Reset by state machine.  
5
Readback of the raw signal value.  
Allow direct control of this signal's input to the  
debounce logic when the ANALOG_OVRDE bit is set  
to 1.  
Reset by state machine.  
4
Readback of the raw signal value.  
Allow direct control of this signal's input to the  
debounce logic when the ANALOG_OVRDE bit is set  
to 1.  
Reset by state machine.  
3
Readback of the raw signal value.  
Allow direct control of this signal's input to the  
debounce logic when the ANALOG_OVRDE bit is set  
to 1.  
Reset by state machine.  
2
Readback of the raw signal value.  
Allow direct control of this signal's input to the  
debounce logic when the ANALOG_OVRDE bit is set  
to 1.  
Reset by state machine.  
1
Readback of the raw signal value.  
Allow direct control of this signal's input to the  
debounce logic when the ANALOG_OVRDE bit is set  
to 1.  
Reset by state machine.  
0
Readback of the raw signal value.  
Allow direct control of this signal's input to the  
debounce logic when the ANALOG_OVRDE bit is set  
to 1.  
Reset by state machine.  
Register E1h DCDC/LDO status  
PD, February 2011, Rev 4.4  
315  
w
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