Production Data
WM8352
17.7.8 INTERRUPTS AND FAULT PROTECTION
The battery charger can raise a first-level interrupt, CHG_INT (see Section 24) to report status and
fault conditions to the host processor. The CHG_INT interrupt is the logical OR of all the second-level
interrupts described in Table 111.
Note: If a battery is connected to the BATT pin, but the WM8352 is being powered from the Wall or
USB supplies, then disconnection of the Wall or USB supply will cause the
CHG_VBATT_LT_3P1_EINT and CHG_VBATT_LT_2P85_EINT interrupts to be set.
The CHG_VBATT_LT_3P1_EINT and CHG_VBATT_LT_2P85_EINT interrupts can be masked by
setting the associated mask bits defined in Table 111.
Alternatively, the EXT_USB_FB_EINT and/or EXT_WALL_FB_EINT interrupts (see Section 17.5)
can be used to validate the Battery Undervoltage interrupts - if one of the External Feedback
interrupts is set at the same time as the Battery Undervoltage interrupts, then the Battery
Undervoltage interrupts should be ignored.
ADDRESS
BIT
LABEL
DESCRIPTION
Battery temp too hot.
R25 (19h)
15
CHG_BATT_HOT_EINT
Interrupt
Status 1
(Rising Edge triggered)
Note: This bit is cleared once read.
Battery temp too cold.
14
13
12
11
10
9
CHG_BATT_COLD_EINT
CHG_BATT_FAIL_EINT
CHG_TO_EINT
(Rising Edge triggered)
Note: This bit is cleared once read.
Battery fail.
(Rising Edge triggered)
Note: This bit is cleared once read.
Charger timeout.
(Rising Edge triggered)
Note: This bit is cleared once read.
Charging final stage.
CHG_END_EINT
(Rising Edge triggered)
Note: This bit is cleared once read.
Charging started.
CHG_START_EINT
CHG_FAST_RDY_EINT
(Rising Edge triggered)
Note: This bit is cleared once read.
Indicates that the charger is ready to go
into fast charge.
(Rising Edge triggered)
Note: This bit is cleared once read.
Battery Voltage < 3.9 interrupt.
(Rising Edge triggered)
2
1
CHG_VBATT_LT_3P9_EINT
CHG_VBATT_LT_3P1_EINT
Note: This bit is cleared once read.
Battery voltage < 3.1 interrupt.
(Rising Edge triggered)
Note: This bit is cleared once read.
Battery voltage < 2.85 interrupt.
(Rising Edge triggered)
0
CHG_VBATT_LT_2P85_EIN
T
Note: This bit is cleared once read.
R33 (21h)
15:0
“IM_” + name of respective bit Mask bits for battery charger interrupts
in R25 (19h)
Interrupt
Status 1
mask
Each of these bits masks the respective
bit in R25 when it is set to 1 (e.g.
CHG_FAST_RDY in R25 does not trigger
a CHG_INT interrupt when
IM_CHG_FAST_RDY in R33 is set).
Table 111 Battery Charger Interrupts
PD, February 2011, Rev 4.4
167
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
