WM8326
Production Data
REFER TO
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
8 = DC-DC1 DVS Done
9 = DC-DC2 DVS Done
10 = External Power Enable1
11 = External Power Enable2
12 = System Supply Good (SYSOK)
13 = Converter Power Good (PWR_GOOD)
14 = External Power Clock (2MHz)
15 = Auxiliary Reset
SYSOK_THR
[2:0]
SYSOK threshold (rising PVDD)
3:1
101
This is the rising PVDD voltage at which SYSOK will be
asserted
000 = 2.8V
001 = 2.9V
…
111 = 3.5V
Note that the SYSOK hysteresis margin is added to
these threshold levels.
Register 781Fh GPIO6 OTP Control
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
R30759
(7827h) ICE
CHECK
DATA
ICE_VALID_D
ATA [15:0]
This field is checked in development mode when an
‘ON’ transition is requested. A value of A596h is
required to confirm valid data.
15:0
0000_0000
_0000_000
0
Register 7827h ICE CHECK DATA
PD, June 2012, Rev 4.0
246
w