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WM8321GEFL/RV 参数 Datasheet PDF下载

WM8321GEFL/RV图片预览
型号: WM8321GEFL/RV
PDF下载: 下载PDF文件 查看货源
内容描述: 处理器电源管理子系统 [Processor Power Management Subsystem]
分类和应用:
文件页数/大小: 253 页 / 1578 K
品牌: WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
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Production Data  
WM8321  
18 AUXILIARY ADC  
18.1 GENERAL DESCRIPTION  
The WM8321 incorporates a 12-bit Auxiliary ADC (AUXADC). This can be used to perform a number  
of system measurements (including supply voltages and battery temperature) and can also be used to  
measure analogue voltages from external sources and sensors.  
External inputs to the AUXADC should be connected to the pins GPIO10, GPIO11 and GPIO12. The  
maximum voltage that can be measured is determined by the power domain associated with each;  
this is selectable on a pin by pin basis as described in Section 21.3.  
Note that, when GPIO10, GPIO11 or GPIO12 is used as an input to the AUXADC, then the normal  
GPIO functionality cannot be supported on the affected pin(s). In this case, it is recommended that  
the respective GPIO(s) are tri-stated, as described in Section 21.3.  
18.2 AUXADC CONTROL  
The AUXADC is enabled by setting the AUX_ENA register bit. By default, the AUXADC is not enabled  
in the SLEEP state, but this can be selected using the AUX_SLPENA field.  
The AUXADC measurements can be initiated manually or automatically. For automatic operation, the  
AUX_RATE register is set according to the required conversion rate, and conversions are enabled by  
setting the AUX_CVT_ENA bit. For manual operation, the AUX_RATE register is set to 00h, and each  
manual conversion is initiated by setting the AUX_CVT_ENA bit. In manual mode, the  
AUX_CVT_ENA bit is reset by the WM8321 after each conversion. (Note that the conversion result is  
not available for readback until the AUXADC interrupt is asserted, as described in Section 18.5.)  
The AUXADC has 5 available input sources. Each of these inputs is enabled by setting the respective  
bit in the AuxADC Source Register (R16431).  
For each AUXADC measurement event (in Manual or Automatic modes), the WM8321 selects the  
next enabled input source. Any number of inputs may be selected simultaneously; the AUXADC will  
measure each one in turn. Note that only a single AUXADC measurement is made on any Manual or  
Automatic trigger.  
For example, if the GPIO10, GPIO12 and PVDD voltages are enabled for AUXADC measurement,  
then GPIO10 would be measured in the first instance, and GPIO12 then PVDD would be measured  
on the next manual or automatic AUXADC triggers. In this case, a total of three manual or automatic  
AUXADC triggers would be required to measure all of the selected inputs.  
The control fields associated with initiating AUXADC measurements are defined in Table 45.  
ADDRESS  
R16430  
BIT  
LABEL  
AUX_ENA  
DEFAULT  
DESCRIPTION  
AUXADC Enable  
15  
0
(402Eh)  
0 = Disabled  
1 = Enabled  
AuxADC  
Control  
Note - this bit is reset to 0 when the  
OFF power state is entered.  
AUX_CVT_ENA  
AUXADC Conversion Enable  
0 = Disabled  
14  
0
1 = Enabled  
In automatic mode, conversions are  
enabled by setting this bit.  
In manual mode (AUX_RATE = 0),  
setting this bit will initiate a  
conversion; the bit is reset  
automatically after each conversion.  
AUX_SLPENA  
AUXADC SLEEP Enable  
0 = Disabled  
12  
0
1 = Controlled by AUX_ENA  
PD, February 2012, Rev 4.0  
97  
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