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WM8321GEFL/RV 参数 Datasheet PDF下载

WM8321GEFL/RV图片预览
型号: WM8321GEFL/RV
PDF下载: 下载PDF文件 查看货源
内容描述: 处理器电源管理子系统 [Processor Power Management Subsystem]
分类和应用:
文件页数/大小: 253 页 / 1578 K
品牌: WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
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Production Data  
WM8321  
18.3 AUXADC READBACK  
Measured data from the AUXADC is read via the AuxADC Data Register (R16429), which contains  
two fields. The AUXADC Data Source is indicated in the AUX_DATA_SRC field; the associated  
measurement data is contained in the AUX_DATA field.  
Reading from the AuxADC Data Register returns a 12-bit code which represents the most recent  
AUXADC measurement on the associated channel. It should be noted that every time an AUXADC  
measurement is written to the AuxADC Data Register, the previous data is overwritten - the host  
processor should ensure that data is read from this register before it is overwritten. The AUXADC  
interrupts can be used to indicate when new data is available - see Section 18.5.  
The 12-bit AUX_DATA field can be equated to the actual voltage (or temperature) according to the  
following equations, where AUX_DATA is regarded as an unsigned integer:  
The maximum voltage that can be measured on the input pins GPIO10, GPIO11 and GPIO12 is  
determined by the power domain associated with each; this is selectable on a pin by pin basis using  
the GPn_PWR_DOM register bits described in Section 21.3. The input voltage at the GPIO pin must  
not exceed the voltage of the respective power domain (ie. DBVDD or PVDD).  
In a typical application, it is anticipated that the AUXADC Interrupts would be used to control the  
AUXADC readback - the host processor should read the AUXADC Data Register in response to the  
AUXADC Interrupt event. See Section 18.5 for details of AUXADC Interrupts. In Automatic AUXADC  
mode, the processor should complete this action before the next measurement occurs, in order to  
avoid losing any AUXADC samples. In Manual conversion mode, the interrupt signal provides  
confirmation that the commanded measurement has been completed.  
The control fields associated with initiating AUXADC readback are defined in Table 46.  
ADDRESS  
R16429  
(402Dh)  
BIT  
LABEL  
DEFAULT  
DESCRIPTION  
AUXADC Data Source  
AUX_DATA_SRC  
[3:0]  
15:12  
000  
1 = GPIO10  
AuxADC Data  
2 = GPIO11  
3 = GPIO12  
5 = Chip Temperature  
7 = PVDD voltage  
All other values are Reserved  
AUXADC Measurement Data  
Voltage (mV) = AUX_DATA x 1.465  
AUX_DATA [11:0]  
11:0  
000h  
ChipTemp (C) = (498 - AUX_DATA)  
/ 1.09  
Table 46 AUXADC Readback  
PD, February 2012, Rev 4.0  
99  
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