欢迎访问ic37.com |
会员登录 免费注册
发布采购

WM8321GEFL/RV 参数 Datasheet PDF下载

WM8321GEFL/RV图片预览
型号: WM8321GEFL/RV
PDF下载: 下载PDF文件 查看货源
内容描述: 处理器电源管理子系统 [Processor Power Management Subsystem]
分类和应用:
文件页数/大小: 253 页 / 1578 K
品牌: WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
 浏览型号WM8321GEFL/RV的Datasheet PDF文件第83页浏览型号WM8321GEFL/RV的Datasheet PDF文件第84页浏览型号WM8321GEFL/RV的Datasheet PDF文件第85页浏览型号WM8321GEFL/RV的Datasheet PDF文件第86页浏览型号WM8321GEFL/RV的Datasheet PDF文件第88页浏览型号WM8321GEFL/RV的Datasheet PDF文件第89页浏览型号WM8321GEFL/RV的Datasheet PDF文件第90页浏览型号WM8321GEFL/RV的Datasheet PDF文件第91页  
Production Data  
WM8321  
ADDRESS  
BIT  
LABEL  
DESCRIPTION  
Default value is 1 (masked)  
Notes:  
1. n is a number between 1 and 10 that identifies the individual LDO Regulator (LDO1 - 10).  
2. m is a number between 1 and 4 that identifies the individual DC-DC Converter (DC-DC1 - 4).  
Table 39 Power Management Interrupts  
15.13 POWER GOOD INDICATION  
The WM8321 can indicate the status of the DC-DC Converters and LDO Regulators via a GPIO pin  
configured as a “PWR_GOOD” output (see Section 21).  
Each DC-DC Converter and LDO Regulator to be monitored in this way must be individually enabled  
as an input to the PWR_GOOD function using the register bits defined in Table 40.  
When a GPIO pin is configured as a “PWR_GOOD” output, this signal is asserted when all selected  
DC-DC Converters and LDO Regulators are operating correctly. If any of the enabled DC-DC  
Converters or LDO Regulators is undervoltage, then the PWR_GOOD will be de-asserted. In this  
event, the host processor should read the Undervoltage Interrupt fields to determine which DC-DC  
Converter or LDO Regulator is affected.  
Note that an Undervoltage condition may lead to a Converter being switched off automatically. In this  
case, the disabled Converter will not indicate the fault condition via PWR_GOOD. Accordingly, the  
PWR_GOOD signal may not be a reliable output in cases where the WM8321 is configured to shut  
down any Converters automatically under Undervoltage conditions. It is recommended that the host  
processor should read the Undervoltage Interrupts in response to PWR_GOOD being de-asserted.  
The host processor can then initiate the most appropriate response.  
PD, February 2012, Rev 4.0  
87  
w
 复制成功!