WM8321
Production Data
15.9 FAULT PROTECTION
Each of the DC-DC Buck Converters (1 to 4) is monitored for voltage accuracy and fault conditions.
An undervoltage condition is set if the output voltage falls below the required level by more than the
applicable undervoltage margin, as specified in Section 7.1.
Each LDO Regulator (1 to 10) is monitored for voltage accuracy and fault conditions. An undervoltage
condition is set if the output voltage falls below the required level by more than the undervoltage
margin, as specified in Section 7.2.
The DCm_ERR_ACT and LDOn_ERR_ACT fields configure the fault response to an Undervoltage
condition. An Interrupt is always triggered under this condition (see Section 15.12); additional action
can also be selected independently for each converter / regulator. The options are to ignore the fault,
shut down the converter, or to shut down the system. To prevent false alarms during short current
surges, faults are only signalled if the fault condition persists.
If a fault condition is detected, and the selected response is to shut down the converter or regulator,
then the associated _ENA and _STS fields are reset to 0, as described in Section 15.2.
If a fault condition is detected, and the selected response is to shut down the system, then a Device
Reset is triggered, as described in Section 24.1, forcing a transition to the OFF state. The WM8321
will automatically return to the ON state after performing the Device Reset.
Note that, if the fault condition persists, then a maximum of 6 Device Resets will be attempted to
initiate the start-up sequence. If the sequence fails more than 6 times, the WM8321 will remain in the
OFF state until the next valid ON state transition event occurs.
Note that DC-DC1 and DC-DC2 overvoltage and high current conditions can be detected and
reported as described in Section 15.10. The DCm_ERR_ACT fields have no relation to these
conditions.
The DC-DC3 and DC-DC4 Converters have a selectable overvoltage protection feature, controlled by
DC3_OVP or DC4_OVP. This affects the converter response when the applicable converter is
enabled or when its output voltage is increased. When the overvoltage protection is enabled, there is
less overshoot in the output voltage, but some oscillation may occur as the voltage settles. This
function should only be enabled if steep load transients are present on the output of the DC-DC
Converter and if voltage overshoot is critical.
15.10 MONITORING AND FAULT REPORTING
Each of the DC-DC Converters (1 to 4) and LDOs (1 to 10) is monitored for voltage accuracy and fault
conditions. An undervoltage condition is detected if the voltage falls below the required level by more
than a pre-determined tolerance. If an undervoltage condition occurs, then this is indicated using the
corresponding status bit(s) defined in Section 15.11.5. An undervoltage condition also triggers an
Undervoltage Interrupt (see Section 15.12). Additional actions to shut down the converter or perform
a Device Reset may also be selected.
The Internal LDO (LDO13) is also monitored for voltage accuracy and fault conditions. An
undervoltage condition in LDO13 is indicated using the INTLDO_UV_STS bit. This undervoltage
condition also causes an OFF transition to be scheduled, as described in Section 11.3.
DC-DC Converters 1 and 2 are monitored for overvoltage conditions. An overvoltage condition is set if
the voltage is more than 100mV above the required level. If an overvoltage condition occurs, then this
is indicated using the corresponding status bit(s). Note that there is no Interrupt or other selectable
response to an overvoltage condition.
The current draw on DC-DC Converters 1 and 2 can be monitored against user-programmable
thresholds in order to detect
a high current condition. This feature is enabled using
DCm_HC_IND_ENA and the current threshold is set using DCm_HC_THR. Note that the high current
threshold is not the same as the maximum current capability of the DC-DC Converters, but is set
according to the application requirements. If a high current condition occurs, then this is indicated
using the corresponding status bit(s). A high current condition also triggers a High Current Interrupt
(see Section 15.12).
PD, February 2012, Rev 4.0
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