欢迎访问ic37.com |
会员登录 免费注册
发布采购

WM8321GEFL/RV 参数 Datasheet PDF下载

WM8321GEFL/RV图片预览
型号: WM8321GEFL/RV
PDF下载: 下载PDF文件 查看货源
内容描述: 处理器电源管理子系统 [Processor Power Management Subsystem]
分类和应用:
文件页数/大小: 253 页 / 1578 K
品牌: WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
 浏览型号WM8321GEFL/RV的Datasheet PDF文件第46页浏览型号WM8321GEFL/RV的Datasheet PDF文件第47页浏览型号WM8321GEFL/RV的Datasheet PDF文件第48页浏览型号WM8321GEFL/RV的Datasheet PDF文件第49页浏览型号WM8321GEFL/RV的Datasheet PDF文件第51页浏览型号WM8321GEFL/RV的Datasheet PDF文件第52页浏览型号WM8321GEFL/RV的Datasheet PDF文件第53页浏览型号WM8321GEFL/RV的Datasheet PDF文件第54页  
WM8321  
Production Data  
Page 0 of the DCRW contains a 128-bit pseudo-random unique ID. The unique ID is written to the  
OTP at the time of manufacture. It is copied to the DCRW when the WM8321 schedules an ‘ON’  
transition. This data cannot be changed.  
Page 1 of the DCRW contains factory-set calibration and configuration data. This data is written to the  
OTP at the time of manufacture. It is copied to the DCRW when the WM8321 schedules an ‘ON’  
transition. This data cannot be changed.  
Page 2 and Page 3 of the DCRW contain bootstrap configuration data. This defines the sequence  
and voltage requirements for powering up the WM8321, and for configuring functions such as the  
clocks, GPIO1-6 and LED status indicators. Under default conditions, the bootstrap data is loaded  
into the DCRW when the WM8321 schedules an ‘ON’ transition. The WM8321 automatically  
determines whether to load the bootstrap data from ICE or from OTP as described in Section 14.3.  
Page 4 of the DCRW contains a register that is used for ICE validity checking. It is copied to the  
DCRW whenever the bootstrap configuration data is loaded from ICE in response to a start-up  
request in development mode. This register field enables the ICE data to be checked for valid  
content.  
The OTP contains 4 pages of data, as illustrated in Figure 18. The contents of the OTP pages  
correspond to Pages 0, 1, 2 and 3 of the DCRW register map addresses.  
The ICE memory contains 3 pages of data, as illustrated in Figure 18. The contents of the ICE pages  
correspond to Pages 2, 3 and 4 of the DCRW register map addresses.  
Note that the ICE memory (recommended component) is arranged as 8-bit words in “big-endian”  
format, and is therefore addressed as 6 pages of 8-bit data, corresponding to 3 pages of 16-bit data.  
For example, the ICE memory address 00h corresponds to bits 15:8 of the first register map word in  
DCRW Page 2, and ICE address 01h corresponds to bits 7:0 of that same register word in DCRW.  
The DCRW can be accessed directly using the Control Interface in the OFF, ON and SLEEP power  
states. Note that Read/Write access to the ICE or OTP memories is not possible directly; these can  
only be accessed by copying to/from the DCRW.  
In the PROGRAM state, Page 2 and Page 3 of the DCRW can be written to the OTP.  
14.3 BOOTSTRAP (START-UP) FUNCTION  
Under default conditions, the WM8321 bootstrap configuration data is loaded when the WM8321  
schedules an ‘ON’ transition. The bootstrap configuration data is loaded into Page 2 and Page 3 of  
the DCRW from either an external ICE or from the integrated OTP. (The factory-set data in Page 0  
and Page 1 is always loaded from the integrated OTP memory.)  
If Development mode is selected, then the bootstrap data is loaded from the InstantConfigTM  
EEPROM (ICE). If Development mode is not selected, then the bootstrap data is loaded from the  
OTP memory.  
14.3.1 START-UP FROM OTP MEMORY  
In volume production, development mode is not usually selected. In this case, the bootstrap  
configuration data is loaded from the internal OTP memory.  
The WM8321 performs a check for valid OTP data; if the OTP_CUST_ID field is set to zero, then the  
WM8321 remains in the OFF power state. A non-zero OTP_CUST_ID field is used to confirm valid  
OTP contents.  
The OTP memory contents are defined similarly to Pages 0, 1, 2 and 3 of the DCRW memory  
contents listed in Section 14.6.  
PD, February 2012, Rev 4.0  
50  
w
 复制成功!