WM8321
Production Data
30.5 PCB LAYOUT
Poor PCB layout will degrade the performance and be a contributory factor in EMI, ground bounce
and resistive voltage losses. Poor regulation and instability can result.
Simple design rules can be implemented to negate these effects:
External input and output capacitors should be placed as close to the device as possible using short
wide traces between the external power components. For the DC-DC Converters, the input capacitor
placement takes priority on the DC-DC converters. (For the LDO Regulators, the placement of the
input and output capacitors have equal priority.)
Route the DC-DC converter output voltage feedback as an independent connection to the top of the
output capacitor to create a true sense of the output voltage, routing away from noisy signals such as
the LX connection.
Use a local ground island for each individual DC-DC converter connected at a single point onto a fully
flooded ground plane.
Current loop areas should be kept as small as possible with loop areas changing little during
alternating switching cycles.
The layout in Figure 32, for example, shows DC-DC1 layout with external components C8, L1 and C1.
The input capacitor, C8, is close into the IC and shares a small ground island with the output
capacitor C1. The inductor, L1, is situated in close proximity to C1 in order to keep loop area small
and minimise the trace resistance. Note also the use of short wide traces with all power tracking on a
single (top) layer.
Figure 32 PCB Layout
PD, February 2012, Rev 4.0
250
w
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
