WM8224
Production Data
ELECTRICAL CHARACTERISTICS
40MHZ OPERATION
Test Conditions
AVDD = DVDD = 3.3V, AGND = DGND = 0V, TA = 25C, MCLK = 40MHz unless otherwise stated.
PARAMETER
SYMBOL
TEST
MIN
TYP
MAX
UNIT
CONDITIONS
Overall System Specification (including 16-bit ADC, PGA, Offset and CDS functions)
Max Conversion rate
40
MSPS
Vp-p
Vp-p
Vp-p
Vp-p
Full-scale input voltage range
(see Note 1)
LOWREFS=0, Max Gain
LOWREFS=0, Min Gain
LOWREFS=1, Max Gain
LOWREFS=1, Min Gain
FOL_EN=0
0.25
3.03
0.15
1.82
Input signal limits (see Note 2)
VIN
AGND-0.3
AVDD+0.3
V
V
FOL_EN=1, minimum
FOL_EN=1, maximum
RINP, GINP, BINP to AGND
AGND
AGND+1.2
10
V
Input capacitance
CIN
pF
mV
Full-scale transition error
Gain = 0dB;
20
PGA[8:0] = 18(hex)
Zero-scale transition error
Gain = 0dB;
20
mV
PGA[8:0] = 18(hex)
Differential non-linearity
Integral non-linearity (pk-pk/2)
Channel to channel gain matching
Output noise
DNL
INL
16-bit
16-bit
1.2
56
LSB
LSB
1.3
%
Unity Gain
10.2
LSB rms
(Unused channels grounded)
Programmable Gain Amplifier
Resolution
Gain
9
bits
V/V
7.34
0.66
* PGA[8 : 0]
511
Max gain, each channel
Min gain, each channel
Analogue to Digital Converter
Resolution
GMAX
GMIN
8
V/V
V/V
0.66
16
40
2
bits
MSPS
V
Speed
Full-scale input range
(2*(VRT-VRB))
LOWREFS=0
LOWREFS=1
1.2
V
60MHZ OPERATION
Test Conditions
AVDD = DVDD = 3.3V, AGND = DGND = 0V, TA = 25C, MCLK = 60MHz unless otherwise stated.
PARAMETER
SYMBOL
TEST
MIN
TYP
MAX
UNIT
CONDITIONS
Overall System Specification (including 10-bit ADC, PGA, Offset and CDS functions)
Max Conversion rate
60
MSPS
Vp-p
Vp-p
Vp-p
Vp-p
V
Full-scale input voltage range
(see Note 1)
LOWREFS=0, Max Gain
LOWREFS=0, Min Gain
LOWREFS=1, Max Gain
LOWREFS=1, Min Gain
FOL_EN=0
0.26
3.03
0.16
1.82
Input signal limits (see Note 2)
VIN
AGND-0.3
AVDD+0.3
FOL_EN=1, minimum
FOL_EN=1, maximum
RINP, GINP, BINP to AGND
AGND
AGND+1.2
10
V
V
Input capacitance
CIN
pF
Full-scale transition error
Gain = 0dB;
20
mV
PGA[8:0] = 18(hex)
PD, Rev 4.1, June 2012
7
w