WM8213
Production Data
ELECTRICAL CHARACTERISTICS
Test Conditions
AVDD = DVDD1 = DVDD2 = 3.3V, AGND = DGND = 0V, TA = 25°C, MCLK = 24MHz unless otherwise stated.
PARAMETER
SYMBOL
TEST
MIN
TYP
MAX
UNIT
CONDITIONS
Overall System Specification (including 16-bit ADC, PGA, Offset and CDS functions)
Conversion rate
24
MSPS
Vp-p
Vp-p
Vp-p
Vp-p
V
Full-scale input voltage range
(see Note 1)
LOWREFS=0, Max Gain
LOWREFS=0, Min Gain
LOWREFS=1, Max Gain
LOWREFS=1, Min Gain
0.25
3.03
0.15
1.82
Input signal limits (see Note 2)
Input Capacitance
VIN
AGND-0.3
AVDD+0.3
10
50
pF
Ω
(RINP, GINP, BINP
Input Impedance
(RINP, GINP, BINP
)
)
Full-scale transition error
Gain = 0dB;
PGA[8:0] = 18(hex)
20
20
mV
Zero-scale transition error
Gain = 0dB;
PGA[8:0] = 18(hex)
mV
LSB
LSB
Differential non-linearity
Integral non-linearity
DNL
INL
1
25
Channel to channel gain matching
Total output noise
1
%
Min Gain
Max Gain
12.4
105
LSB rms
LSB rms
References
Upper reference voltage
VRT
VRB
LOWREFS=0
LOWREFS=1
LOWREFS=0
LOWREFS=1
1.95
0.95
2.05
1.85
1.05
1.25
1.25
1.0
2.25
1.25
V
Lower reference voltage
V
V
V
Ω
Input return bias voltage
VRX
VRTB
Diff. reference voltage (VRT-VRB)
LOWREFS=0
LOWREFS=1
0.90
1.10
0.6
Output resistance VRT, VRB, VRX
1
Notes:
1.
Full-scale input voltage denotes the peak input signal amplitude that can be gained to match the ADC full-scale
input range.
2.
Input signal limits are the limits within which the full-scale input voltage signal must lie.
PD Rev 4.0 July 2007
6
w