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WM2629 参数 Datasheet PDF下载

WM2629图片预览
型号: WM2629
PDF下载: 下载PDF文件 查看货源
内容描述: 八路8位,串行输入,电压输出DAC,具有掉电 [Octal 8-bit, Serial Input, Voltage Output DAC with Power Down]
分类和应用:
文件页数/大小: 13 页 / 121 K
品牌: WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
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Production Data  
WM2629  
Test Characteristics:  
Over recommended operating conditions (unless noted otherwise).  
TEST  
PARAMETER  
SYMBOL  
MIN  
TYP  
MAX  
UNIT  
CONDITIONS  
Digital Inputs  
High level input current  
Low level input current  
Input capacitance  
IIH  
IIL  
CI  
Input voltage = DVDD  
Input voltage = 0V  
1
µA  
µA  
pF  
-1  
8
7
Digital Output  
High level digital output voltage  
Low level digital output voltage  
Output voltage rise time  
VOH  
VOL  
Load = 10kΩ  
Load = 10kΩ  
2.6  
V
V
0.4  
20  
Load = 10k, 20pF, includes  
ns  
propagation delay  
Notes:  
1. Integral non-linearity (INL) is the maximum deviation of the output from the line between zero and full scale excluding  
the effects of zero code and full scale errors).  
2. Differential non-linearity (DNL) is the difference between the measured and ideal 1LSB amplitude change  
of any adjacent two codes. A guarantee of monotonicity means the output voltage changes in the same  
direction (or remains constant) as a change in digital input code.  
3. Zero code error is the voltage output when the DAC input code is zero.  
4. Gain error is the deviation from the ideal full-scale output excluding the effects of zero code error.  
5. Power supply rejection ratio is measured by varying AVDD from 4.5V to 5.5V and measuring the  
proportion of this signal imposed on the zero code error and the gain error.  
6. Zero code error and Gain error temperature coefficients are normalised to full-scale voltage.  
7. Output load regulation is the difference between the output voltage at full scale with a 10kload and 2kΩ  
load. It is expressed as a percentage of the full scale output voltage with a 10kload.  
8.  
I
DD is measured while continuously writing code 128 to the DAC. For VIH < DVDD - 0.7V and VIL > 0.7V  
supply current will increase.  
9. Slew rate results are for the lower value of the rising and falling edge slew rates.  
10. Settling time is the time taken for the signal to settle to within 0.5LSB of the final measured value for both rising and  
falling edges. Limits are ensured by design and characterisation, but are not production tested.  
WOLFSON MICROELECTRONICS LTD  
PD Rev 1.0 April 2001  
5