WAN_0143
The delay described in Table 2 refers to the length of time delay there will be from the edge of the
MASK signal to the start of the next auxiliary ADC conversion. This delay is defined as shown in
Table 3 and Table 4 below.
REGISTER
ADDRESS
BIT
7:4
LABEL
DEL
DEFAULT
DESCRIPTION
76h
0000
Delay Time
(1 frame)
Table 3 Delay Time Control (1)
DEL
DELAY
DELAY
(TIME)
(AC-LINK FRAMES)
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
1
2
4
20.8µs
41.7µs
83.3µs
167µs
333µs
667µs
1ms
8
16
32
48
64
96
128
160
192
224
256
288
1.33ms
2ms
2.67ms
3.33ms
4ms
4.67ms
5.33ms
6ms
No delay, switch matrix always on
Table 4 Delay Time Control (2)
The delay associated to MASK is the same as the settling delay associated with the actual auxiliary
ADC measurement.
For example, when MODE is Edge triggered, an edge on the MASK input will cause the next auxiliary
ADC measurement to be delayed by the value set in register 76h. After this delay for MASK the
auxiliary ADC conversion will be started.
Figure 1 details the timing associated with the delay set to 2 frames for each of the active MASK
modes.
With MASK = 11, a conversion will be commanded and triggered by an edge of the MASK signal.
The delay from MASK edge to conversion is set by the DEL register setting. The delay is started on
the first SYNC pulse after an edge is detected on MASK (see figure 2 for further details).
With MASK = 10, a previously commanded conversion is paused by a delay reflected in the DEL
register setting.
With MASK = 01, any commanded conversions will be delayed while the MASK signal is HIGH.
Once the MASK signal returns low normal operation will resume.
Rev 1.0 March 2004
2
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
