W83627HF/ F/ HG/ G
7.4.2 Fan speed control
The W83627HF provides 2 sets for fan PWM speed control. The duty cycle of PWM can be pro-
grammed by a 8-bit registers which are defined in the Bank0 CR5A and CR5B. The default duty cycle
is set to 100%, that is, the default 8-bit registers is set to FFh. The expression of duty can be repre-
sented as follows.
Programmed 8 - bit Register Value
Duty − cycle(%) =
× 100%
255
The PWM clock frequency also can be program and defined in the Bank0.CR5C. The application cir-
cuit is shown as follows.
+12V
R1
R2
PNP Transistor
D
G
PWM Clock Input
NMOS
S
+
-
C
FAN
Figure. 8.5
Publication Release Date: June 09, 2006
Revision 2.27
- 37 -
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