W83627HF/ F/ HG/ G
CRF7 （Default 0x00）, continued
BIT
DESCRIPTION
1
IRQIN1EN.
0： Disable the generation of an SMI/ PME interrupt due to IRQIN1's IRQ.
1： Enable the generation of an SMI/ PME interrupt due to IRQIN1's IRQ.
0
IRQIN0EN.
0： Disable the generation of an SMI/ PME interrupt due to IRQIN0's IRQ.
1： Enable the generation of an SMI/ PME interrupt due to IRQIN0's IRQ.
CRF9 （Default 0x00）
BIT
DESCRIPTION
7 - 3
2
Reserved. Return zero when read.
PME_EN： Select the power management events to be either an PME or SMI inter-
rupt for the IRQ events. Note that： this bit is valid only when SMIPME_OE = 1.
0： The power management events will generate an SMI event
1： The power management events will generate an PME event.
1
0
Reserved.
SMIPME_OE： This is the SMI and PME output enable bit.
0： Neither SMI nor PME will be generated. Only the IRQ status bit is set.
1： An SMI or PME event will be generated.
CRFE, FF （Default 0x00）
Reserved for Winbond test.
9.13 Logical Device B （Hardware Monitor）
CR30 （Default 0x00）
BIT
7 - 1
0
DESCRIPTION
Reserved.
Logic device activation control
1： Active
0： Inactived
CR60, CR 61 （Default 0x00, 0x00）
These two registers select Hardware Monitor base address [0x100：0xFFF] on 8-byte boundary.
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WINBOND [ WINBOND ]
