W83194BR-97
PRELIMINARY
5.1 Register 0: CPU Frequency Select Register
Bit
@PowerUp
Pin
Description
7
6
5
4
3
0
0
0
0
0
-
-
-
-
-
SSEL3 ( Frequency table selection by software via I2C)
SSEL2 ( Frequency table selection by software via I2C)
SSEL1 ( Frequency table selection by software via I2C)
SSEL0 ( Frequency table selection by software via I2C)
0 = Selection by hardware
1 = Selection by software I2C - Bit (0,2, 6:4)
SSEL4 (Frequency table selection by software via I2C )
0 = Normal
2
1
0
0
-
-
1 = Spread Spectrum enabled
0
0
-
SSEL5 ( Frequency table selection by software via I2C)
5.2 Register 1 : CPU Clock Register (1 = Active, 0 = Inactive)
Bit
@PowerUp
Pin
Description
7
1
40
CPUCLK0(Active / Inactive)
CPUCLK1(Active / Inactive)
CPUCLK2(Active / Inactive)
CPU/2(Active / Inactive)
IOAPIC0 (Active / Inactive)
IOAPIC1 (Active / Inactive)
REF1 (Active / Inactive)
REF0 (Active / Inactive)
6
5
4
3
2
1
0
1
1
1
1
1
1
1
38
37
42
47
46
2
3
5.3 Register 2: PCI Clock Register (1 = Active, 0 = Inactive)
Bit
7
@PowerUp
Pin
18
17
15
14
12
11
9
Description
1
1
1
1
1
1
1
1
PCICLK7 (Active / Inactive)
PCICLK6 (Active / Inactive)
PCICLK5 (Active / Inactive)
PCICLK4 (Active / Inactive)
PCICLK3 (Active / Inactive)
PCICLK2 (Active / Inactive)
PCICLK1 (Active / Inactive)
PCICLK_F (Active / Inactive)
6
5
4
3
2
1
0
8
Publication Release Date: Dec. 1999
Revision 0.35
- 6 -
WINBOND [ WINBOND ]
