ISD5100 – SERIES
5. PIN CONFIGURATION
SCL
1
A1
2
SDA
3
A0
4
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VCCD
VCCD
XCLK
INT
SCL
A1
SDA
A0
VSSD
VSSD
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VCCD
VCCD
XCLK
INT
1
2
3
4
5
6
7
8
VSSD
VSSD
5
6
RAC
VSSA
RAC
VSSA
ISD5116
ISD5108
ISD5104
ISD5102
ISD5116
7
8
NC
MIC+
NC
MIC+
NC
NC
NC
NC
9
9
VSSA
AUX OUT
AUX IN
ANA IN
VCCA
SP+
VSSA
VSSA
AUX OUT
AUX IN
ANA IN
VCCA
SP+
VSSA
10
11
12
13
14
10
11
12
13
14
MIC-
MIC-
ANA OUT+
ANA OUT-
ACAP
ANA OUT+
ANA OUT-
ACAP
SP-
SP-
SOIC
PDIP
NC
NC
VSSA
RAC
INT
1
28
AUX OUT
AUX IN
ANA IN
VCCA
2
27
26
25
24
23
22
21
20
19
18
17
16
15
3
4
XCLK
VCCD
VCCD
SCL
A1
5
ISD5116
SP+
6
VSSA
7
ISD5108
ISD5104
ISD5102
SP-
8
ACAP
ANA OUT-
ANA OUT+
MIC-
9
SDA
A0
10
11
12
13
14
VSSD
VSSD
NC
MIC+
VSSA
TSOP
Publication Release Date: October, 2003
Revision 0.2
- 7 -