ISD5100 – SERIES
Register Bits
The register load may be used to modify a command
sequence (such as load an address) or used with the null
command sequence to load a configuration or test
register. Not all registers are accessible to the user. [RG2
is always 0 as the four additional combinations are
undefined.]
RG2
C2
0
0
0
RG1
C1
0
0
1
RG0 Function
C0
0
1
0
1
No action
Reserved
Load CFG0
Load CFG1
0
1
7.3.3. Opcode Summary
OpCode Command Description
The following commands are used to access the chip through the I2C interface.
ꢁ
ꢁ
ꢁ
ꢁ
ꢁ
ꢁ
ꢁ
ꢁ
ꢁ
ꢁ
Play: analog play command
Record: analog record command
Message Cue: analog message cue command
Read: digital read command
Write: digital write command
Erase: digital page and block erase command
Power up: global power up/down bit. (C7)
Load CFG0: load configuration register 0
Load CFG1: load configuration register 1
Read STATUS: Read the interrupt status and address register, including a hardwired device ID
Publication Release Date: October, 2003
- 17 -
Revision 0.2
WINBOND [ WINBOND ]
