ISD4004 SERIES
7.2.3. SPI Control and Output Registers
The SPI control register provides control of individual function such as play, record, message cueing,
power-up, power-down, start, stop and ignore address pointer operations.
TABLE 3: SPI CONTROL REGISTERS
Control Bit
C0
Control Register
MC
Bit
Device Function
Message Cueing function
=
=
1
0
Enable Message Cueing
Disable Message Cueing
Ignore Address bit
C1
C2
IAB [1]
PU
=
=
1
0
Ignore input address register (A0-A15)
Use the input address register (A0-A15)
Power Up
=
=
1
0
Power-Up
Power-Down
P/R
C3
C4
Playback or Record
Play
Record
=
=
1
0
RUN
Enable or Disable an operation
=
=
1
0
Start
Stop
Address Bits A0-A15
Input address register
TABLE 4: SPI OUTPUT REGISTERS
Output Bits Description
OVF
Overflow
EOM
End-of-Message
P0-P15
Output of the row pointer register
[1]
When IAB (Ignore Address Bit) is set to 0, a playback or record operation starts from address (A0-A15). For
consecutive playback or record, IAB should be changed to a 1 before the end of that row (see RAC timing).
Otherwise the ISD4004 will repeat the operation from the same row address. For memory management, the Row
Address Clock (RAC) signal and IAB can be used to move around the memory segments.
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