BRIGHT
Microelectronics
Inc.
Preliminary BM29F400T/BM29F400B
machine is operating will be erroneous. Thus, these address locations will need rewriting after the
device is reset.
FEATURES
· 5.0 V +/- 10% Program and Erase
- Minimizes system-level power requirements
High performance
· RESET
- Hardware pin resets the internal state
machine to the read mode
- 90 nS access time
· Internal Erase Algorithms
- Automatically erases a sector, any
combination of sectors, or the entire
chip
· Compatible with JEDEC-standard Commands
- Uses software commands, pinouts, and
packages following industry standards for
single power supply Flash memory
· Internal Programming Algorithms
- Automatically programs and verifies data at a
specified address
· Typically 100,000 Program/Erase Cycles
· Sector Erase Architecture
- One 16 Kbytes, two 8 Kbytes, one 32 Kbytes,
and seven 64 Kbytes
· Low Power Consumption
- 20 mA typical active read current for Byte
Mode
- Any combination of sectors can be erased
concurrently; also supports full chip erase
- 28 mA typical active read current for Word
Mode
- 30 mA typical write/erase current
· Erase Suspend/Resume
- Suspend a sector erase operation to allow a
data read in a sector not being erased within
the same device
· Sector Protection
- Hardware method disables any combination
of sectors from a program or erase operation
· Ready/Busy
- RY/BY output pin for detection of
programming or erase cycle completion
· Boot Code Sector Architecture
-90
-120
120
120
-150
150
150
FAMILY PART NO.
Maximum Access Time (nS)
90
90
CE (E) Access time (nS)
OE (G) Access time (nS)
35
50
60
*This speed is available with Vcc = 5V +/- 5% variation
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