WCSS0418V1P
Cycle Descriptions
[1, 2, 3]
Next Cycle
Unselected
Unselected
Unselected
Unselected
Unselected
Begin Read
Begin Read
Continue Read
Continue Read
Continue Read
Continue Read
Suspend Read
Suspend Read
Suspend Read
Suspend Read
Begin Write
Begin Write
Begin Write
Continue Write
Continue Write
Suspend Write
Suspend Write
ZZ “Sleep”
Add. Used
None
None
None
None
None
External
External
Next
Next
Next
Next
Current
Current
Current
Current
Current
Current
External
Next
Next
Current
Current
None
ZZ
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
CE
3
X
1
X
1
X
0
0
X
X
X
X
X
X
X
X
X
X
0
X
X
X
X
X
CE
2
X
X
0
X
0
1
1
X
X
X
X
X
X
X
X
X
X
1
X
X
X
X
X
CE
1
1
0
0
0
0
0
0
X
X
1
1
X
X
1
1
X
1
0
X
1
X
1
X
ADSP
X
0
0
1
1
0
1
1
1
X
X
1
1
X
X
1
X
1
1
X
1
X
X
ADSC
0
X
X
0
0
X
0
1
1
1
1
1
1
1
1
1
1
0
1
1
1
1
X
ADV
X
X
X
X
X
X
X
0
0
0
0
1
1
1
1
1
1
X
0
0
1
1
X
OE
X
X
X
X
X
X
X
1
0
1
0
1
0
1
0
X
X
X
X
X
X
X
X
DQ
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
DQ
Hi-Z
DQ
Hi-Z
DQ
Hi-Z
DQ
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Write
X
X
X
X
X
X
Read
Read
Read
Read
Read
Read
Read
Read
Read
Write
Write
Write
Write
Write
Write
Write
X
Notes:
1. X = “Don't Care,” 1 = HIGH, 0 = LOW.
2. Write is defined by BWE, BW
[1:0]
, and GW. See Write Cycle Description table.
3. The DQ pins are controlled by the current cycle and the OE signal. OE is asynchronous and is not sampled with the clock.
Document #: 38-05247
Page 6 of 17
WEIDA [ WEIDA SEMICONDUCTOR, INC. ]
