WF4M32-XXX5
White Electronic Designs
AC CHARACTERISTICS FOR G4T AND H2 PACKAGES WRITE/ERASE/PROGRAM OPERATIONS,CS CONTROLLED
(VCC = 5ꢀ0V, GND = 0V, TA = -55°C TO +125°C)
Parameter
Symbol
-100
-120
-150
Unit
Min
100
0
Max
Min
120
0
Max
Min
150
0
Max
Write Cycle Time
tAVAV
tWC
tWS
tCP
ns
ns
WriteEnableSetupTime
ChipSelectPulseWidth
AddressSetupTime
tWLEL
tELEH
45
0
50
0
50
0
ns
tAVEL
tAS
tDS
ns
DataSetupTime
tDVEH
45
15
45
20
50
15
50
20
50
15
50
20
ns
Data Hold Time
tEHDX
tDH
tAH
tCPH
ns
AddressHoldTime(1)
ChipSelectPulseWidthHigh
DurationofByteProgrammingOperation(2)
SectorEraseTime(3)
Read Recovery Time
ChipProgrammingTime
ChipEraseTime(4)
tELAX
ns
tEHEL
ns
tWHWH1
tWHWH2
tGHEL
300
15
300
15
300
15
µs
sec
µs
sec
sec
ns
0
0
0
44
44
44
256
256
256
OutputEnableHoldTime(5)
tOEH
10
10
10
NOTES:
1. A21 must be held constant until WE or CS go high, whichever occurs first.
2. Typical value for tWHWH1 is 7µs.
3. Typical value for tWHWH2 is 1sec.
4. Typical value for Chip Erase Time is 32sec.
5. For Toggle and Data Polling.
AC TEST CONDITIONS
FIGꢀ 4 AC TEST CIRCUIT
InputPulseLevels
VIL = 0, VIH = 3.0
V
ns
V
InputRiseandFall
5
InputandOutputReferenceLevel
OutputTimingReferenceLevel
1.5
1.5
V
Notes:
VZ is programmable from -2V to +7V.
IOL & IOH programmable from 0 to 16mA.
Tester Impedance Z0 = 75W.
VZ is typically the midpoint of VOH and VOL.
IOL & IOHare adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
FIGꢀ 5 RESET TIMING DIAGRAM
RESET
tRP
tReady
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WEDC [ WHITE ELECTRONIC DESIGNS CORPORATION ]
