WED7PxxxCFA80xxC25
White Electronic Designs
AC CHARACTERISTICS (cont'd):
True IDE Mode I/O Input (Read) Timing Specification
Item
Symbol
td(IORD)
th(IORD)
tw(IORD)
tsuA(IORD)
thA(IORD)
tsuCE(IORD)
thCE(IORD)
tdfIOIS16(ADR)
tdrIOIS16(ADR)
IEEE Symbol
tIGLQV
Min ns.
Max ns.
100
Data Delay after IORD
Data Hold following IORD
IORD Width Time
Address Setup before IORD
Address Hold following IORD
CE Setup before IORD
CE Hold following IORD
I0IS16 Delay Falling from Address
I0IS16 Delay Rising from Address
tIGHQX
tIGLIGH
tAVIGL
tIGHAX
tELIGL
tIGHEH
tAVISL
tAVISH
0
165
70
20
5
20
35
35
Note: The maximum load on -I0IS16 is 1 LSTTL with 50pF total load. All times are in nanoseconds. Minimum time from WAIT# high to IORD# high is 0 nsec, but minimum IORD# width
must still be met. Dout signifies data provided by the CompactFlash Storage Card or CF+ Card to the system.
True IDE Mode I/O Output (Write) Timing Specification
Item
Symbol
tsu(IOWR)
th(IOWR)
tw(IOWR)
tsuA(IOWR)
thA(IOWR)
tsuCE(IOWR)
thCE(IOWR)
tdfIOIS16(ADR)
tdrIOIS16(ADR)
IEEE Symbol
tDVIWH
tIWHDX
tIWLIWH
tAVIWL
Min ns.
60
30
165
70
20
Max ns.
Data Setup before IOWR
Data Hold following IOWR
IOWR Width Time
Address Setup before IOWR
Address Hold following IOWR
CE Setup before IOWR
CE Hold following IOWR
I0IS16 Delay Falling from Address
I0IS16 Delay Rising from Address
tIWHAX
tELIWL
tIWHEH
tAVISL
tAVISH
5
20
35
35
Note: The maximum load on -I0IS16 is 1 LSTTL with 50pF total load. All times are in nanoseconds. Minimum time from WAIT# high to IOWR# high is 0 nsec, but minimum IOWR#
width must still be met. Din signifies data provided by the system to the CompactFlash Storage Card or CF+ Card.
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
July 2005
Rev. 1
8
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
WEDC [ WHITE ELECTRONIC DESIGNS CORPORATION ]
