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7P001FEA0200C15 参数 Datasheet PDF下载

7P001FEA0200C15图片预览
型号: 7P001FEA0200C15
PDF下载: 下载PDF文件 查看货源
内容描述: [Flash Card, 1MX8, 150ns, CARD-68]
分类和应用: 内存集成电路
文件页数/大小: 6 页 / 65 K
品牌: WEDC [ WHITE ELECTRONIC DESIGNS CORPORATION ]
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PCMCIA Flash Memory Card
FEA Series
Card Signal Description
Symbol
A0 - A25
Type
INPUT
Name and Function
ADDRESS INPUTS:
A0 through A25 enable direct addressing of
up to 64MB of memory on the card. The memory will wrap at the
card density boundary. The system should not try to access memory
beyond the card density. The upper addresses are not connected.
DATA INPUT/OUTPUT:
DQ0 THROUGH DQ15 constitute the
bi-directional databus.
DQ0 - DQ7
constitute the lower (even) byte.
DQ8 – DQ15 are not connected. DQ7 is the MSB.
CARD ENABLE 1 AND 2: CE1#
enables even byte accesses,
CE2# enables odd byte accesses. CE2# is not connected.
OUTPUT ENABLE:
Active low signal enabling read data from the
memory card.
WRITE ENABLE:
Active low signal gating write data to the
memory card.
READY/BUSY OUTPUT:
Indicates status of internally timed erase
or program algorithms. A high output indicates that the card is ready
to accept accesses. This signal is not connected.
CARD DETECT 1 and 2:
Provide card insertion detection. These
signals are connected to ground internally on the memory card. The
host socket interface circuitry shall supply 10K-ohm or larger pull-up
resistors on these signal pins.
WRITE PROTECT:
This signal is pulled low internally. This
signifies write protect = "off " for all cases.
PROGRAM/ERASE POWER SUPPLY:
Provides programming
voltage 12.0V for lower byte (D0 – D7) memory components. VPP1
is connected only for cards with 28F008SA devices, not connected
for 5V only card.
PROGRAM/ERASE POWER SUPPLY:
Provides programming
voltage 12.0V for upper byte (D8 – D15) memory components.
VPP2 is not connected
CARD POWER SUPPLY:
5.0V
GROUND:
for all internal circuitry.
ATTRIBUTE MEMORY SELECT:
N.C. (only used with cards
built with optional attribute memory).
RESET:
Active high signal for placing card in Power-on default
state. Reset can be used as a Power-Down signal for the memory
array.
WAIT:
This signal is pulled high internally for compatibility. No
wait states are generated.
BATTERY VOLTAGE DETECT:
These signals are pulled high to
maintain SRAM card compatibility.
VOLTAGE SENSE:
Notifies the host socket of the card's VCC
requirements. VS1 and VS2 are open to indicate a 5V card has been
inserted.
RESERVED FOR FUTURE USE
NO INTERNAL CONNECTION TO CARD:
pin may be driven
or left floating
DQ0 – DQ15
INPUT/OUT
CE1#, CE2#
OE#
WE#
RDY/BSY#
INPUT
INPUT
INPUT
N.C.
CD1#, CD2#
OUTPUT
WP
VPP1
OUTPUT
VPP2
N.C.
VCC
GND
REG#
RST
N.C.
N.C
WAIT#
BVD1, BVD2
VS1, VS2
OUTPUT
OUTPUT
OUTPUT
RFU
N.C.
Functional Truth Table
Function Mode
Standby Mode
Read Low Byte Access
Write Low Byte Access
/REG /CE2 /CE1
X
X
H
X
X
L
X
X
L
/OE
X
L
H
/WE
X
H
L
D15-D8
High-Z
High-Z
X
D7-D0
High-Z
Even-Byte
Even-Byte
August 2000 Rev. 3 - ECO #13123
3
PC Card Products