欢迎访问ic37.com |
会员登录 免费注册
发布采购

5962-9461203HBA 参数 Datasheet PDF下载

5962-9461203HBA图片预览
型号: 5962-9461203HBA
PDF下载: 下载PDF文件 查看货源
内容描述: [Flash Module, 512KX32, 90ns, CQFP68, CERAMIC, QFP-68]
分类和应用: 内存集成电路
文件页数/大小: 41 页 / 469 K
品牌: WEDC [ WHITE ELECTRONIC DESIGNS CORPORATION ]
 浏览型号5962-9461203HBA的Datasheet PDF文件第1页浏览型号5962-9461203HBA的Datasheet PDF文件第2页浏览型号5962-9461203HBA的Datasheet PDF文件第4页浏览型号5962-9461203HBA的Datasheet PDF文件第5页浏览型号5962-9461203HBA的Datasheet PDF文件第6页浏览型号5962-9461203HBA的Datasheet PDF文件第7页浏览型号5962-9461203HBA的Datasheet PDF文件第8页浏览型号5962-9461203HBA的Datasheet PDF文件第9页  
1.2.4 Case outline(s). The case outlines are as designated in MIL-STD-1835 and as follows:
Outline letter
A
B
M 1/
N
T
U
X
Y
Z
4
9 1/
Descriptive designator
See figure 1
See figure 1
See figure 1
See figure 1
See figure 1
See figure 1
See figure 1
See figure 1
See figure 1
See figure 1
See figure 1
Terminals
68
68
68
68
68
66
66
68
68
66
68
Package style
Co-fired ceramic, single cavity, quad flatpack
Co-fired ceramic, single cavity, quad flatpack
Co-fired ceramic, single/dual cavity, quad flatpack
Co-fired ceramic, single cavity, quad flatpack, low capacitance
Co-fired ceramic, single cavity, low profile, quad flatpack
Co-fired ceramic, hex-in-line, single cavity, with standoffs
Co-fired ceramic, hex-in-line, single cavity, without standoffs
Co-fired ceramic, single cavity, quad flatpack, with tie bars
Co-fired ceramic, single cavity, ultra low profile, quad flatpack
Co-fired ceramic, 1.075", hex-in-line, single cavity, with standoffs
Co-fired ceramic, single cavity, ultra low profile, quad flatpack
1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38534.
1.3 Absolute maximum ratings. 2/
Supply voltage range (V
CC
) 3/ ...................................................
Signal voltage range (V
G
)(any pin except A9 ) 3/ ......................
Power dissipation (P
D
) ...............................................................
Thermal resistance, junction-to-case (θ
JC
):
Case outlines A, M and Z...........................................................
Case outlines U and 4................................................................
Case outlines X and Y ...............................................................
Case outline N ...........................................................................
Case outline B and 9..................................................................
Storage temperature range ........................................................
Lead temperature (soldering, 10 seconds) ................................
Data retention ............................................................................
Endurance (write/erase cycles) ..................................................
A9 voltage for sector protect (V
ID
) 4/ .........................................
1.4 Recommended operating conditions.
Supply voltage range (V
CC
) ........................................................
Input low voltage range (V
IL
) ......................................................
Input high voltage range (V
IH
) ....................................................
Case operating temperature range (T
C
) .....................................
A9 voltage for sector protect ......................................................
+4.5 V dc to +5.5 V dc
-0.5 V dc to +0.8 V dc
+2.0 V dc to V
CC
+ 0.5 V dc
-55°C to +125°C
+11.5 V dc to +12.5 V dc
-2.0 V dc to +7.0 V dc
-2.0 V dc to +7.0 V dc
1.32 W Maximum at 5 MHz
10.2°C/W
10.63°C/W
6.5°C/W
12.36°C/W
4.57°C/W
-65°C to +150°C
+300°C
10 years minimum
10,000 cycles minimum
-2.0 V dc to +14.0 V dc
1/
2/
3/
4/
Due to the short leads of case outlines M (single cavity) and case outline 9, caution should be taken if the system
application is to be used where extreme thermal transitions can occur. Case outline A can be used if longer leads are
necessary.
Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the
maximum levels may degrade performance and affect reliability.
Minimum DC voltage on input or I/O pins is -0.5 V. During voltage transitions, input may overshoot V
SS
to -2.0 V for periods
of up to 20 ns. Maximum DC voltage on output and I/O pins is V
CC
+ 0.5 V. During voltage transitions, outputs may
overshoot to V
CC
+ 2.0 V for periods of up to 20 ns.
Minimum DC input voltage on A9 pin is -0.5 V. During voltage transitions, A9 may overshoot V
SS
to -2.0 V for periods of up
to 20 ns. Maximum DC input voltage on A9 is +13.5 V which may overshoot to +14.0 V for periods of up to 20 ns.
SIZE
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
A
REVISION LEVEL
J
5962-94612
SHEET
3
DSCC FORM 2234
APR 97