Preliminary
VG4632321A
524,288x32x2-Bit
CMOS Synchronous Graphic RAM
VIS
Timing Waveforms
Figure 1. AC Parameters for Write Timing (Burst Length = 4, CAS Latency = 2)
T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22
CLK
t
t
t
CH
CL
CK2
t
Begin Auto Precharge
Bank A
Begin Auto Precharge
Bank B
IS
CKE
CS
t
t
IS
t
IS
IH
RAS
CAS
WE
DSF
BS
t
IH
A9
RAx
RBx
RBx
RBx
RBy
RBy
RAy
RAz
RAz
t
IS
A0 ~ A8
CBx
CAx
RAy
CAy
DQM
DQ
t
RCD
t
DAL
t
IS
t
t
RP
t
t
RC
WR
RRD
t
IH
Hi-Z
Ax0 Ax1
Bx2 Bx3
Ay2
Ay0 Ay1
Ax2 Ax3 Bx0
Bx1
Ay3
Activate
Command
Bank B
Activate
Command
Bank A
Write with
Precharge
Command
Bank A
Activate
Command
Bank A
Write
Command
Bank A
Activate
Command
Bank B
Write with
Auto Precharge
Command
Bank A
Activate
Command
Bank A
Auto Precharge
Command
Bank B
Document:
Rev.1
Page1
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