VG4616321B/VG4616322B
262,144x32x2-Bit
Preliminary
CMOS Synchronous Graphic RAM
VIS
Outline Drawing Information
D
D1
80
51
MILLIMETERS
NOM. MAX. MIN.
INCHES
NOM.
DIM
MAX.
0.134
---
MIN.
---
A
---
---
3.40
---
---
0.010
0.098
0.009
0.004
0.906
0.781
0.669
0.545
---
---
81
50
0.25
2.50
0.22
0.11
23.00
A1
A2
b
c
2.90
0.38
0.23
2.70
0.106 0.114
A2
---
0.006
0.913
0.787
0.677
0.551
---
0.015
0.009
0.921
0.793
0.685
0.557
A
c
0.15
D
23.20
20.00
17.20
14.00
0.65 BASIC
0.88
23.40
20.15
17.40
14.15
E
E1
A1
D1 19.85
L
E
17.00
13.85
q
b
L1
E1
e
L
0.12mm
M
TYP.
0.026 BASIC
0.035
0.73
0¢X
1.03
7¢X
0.029
0¢X
0.041
7¢X
100
31
DETAIL A
L1
q
1.60 REF.
---
0.063 REF.
---
1
30
DETAIL A
NOTE:
1. CONTROLLING DIMENSION : MILLIMETERS
2. DIMENSION D1 & E1 DO NOT INCLUDE MOLD PROTRUSION.
ALLOWABLE PROTRUSION IS 0.25mm PER SIDE.
DIMENSION D1 & E1 INCLUDE MOLD MISMATCH.
3. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION.
ALLOWABLE DAMBAR PROTRUSION SHALL NOT CAUSE THE
LEAD TO BE WIDER THAN THE MAXIMUM b DIMENSION BY
MORE THAN 0.08mm. DAMBAR CANNOT BE LOCATED ON THE
LOWER RADIUS OR THE FOOT.
e
e
0.08mm
SEATING PLANE
Document:1G5-0145
Rev.1
Page82
VML [ VANGUARD INTERNATIONAL SEMICONDUCTOR ]
