Preliminary
VG36641641BT
CMOS Synchronous Dynamic RAM
VIS
Auto Precharge after Read Burst (1 of 2)
Burst Length=4, CAS Latency=2
T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22
CLK
CKE
t
CK2
Start Auto Precharge
Bank A
Start Auto Precharge
Bank B
High
Start Auto Precharge
(Bank D)
(Bank D)
Bank B
CS
RAS
CAS
WE
BS
Ra
Ra
Ra
Rb
Rb
Rc
Rc
A10
Ca
Cb
Cb
Ca
Cc
Ra
ADD
DQM
Hi-Z
QBa0
QBa2
QAb0
QAb2
QAc1
QAb3 QBb0 QBb1 QBb2 QBb3 QAc0 QAc2
QAa3
QBa1
QBa3
QAb1
QAa1
DQ
QAa0
QAa2
Activate
Command
Bank A
Read with
Auto Precharge
Command
Read
Command
Bank A
Activate
Command
Bank B
Read with
Activate
Command
Auto Precharge
Command
Bank B
Read with
Bank A
Bank A
Auto Precharge
Command
Bank B
(Bank D)
Read with
Auto Precharge
Command
(Bank D)
Activate
Command
(Bank D)
Bank B
(Bank D)
Bank A
Document : 1G5-0127
Rev2
Page56