VG36644041DT / VG36648041DT / VG36641641DT
CMOS Synchronous Dynamic RAM
VIS
Power Down Mode and Clock Mask
Burst Length=4, CAS Latency=2
T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22
CLK
CKE
t
t
t
CK2
CKH
CKS
t
CKS
VALID
CS
RAS
CAS
WE
*BS0
A10
RAa
RAa
CAa
ADD
DQM
Hi-Z
QAa0
QAa1
QAa2
DQ
QAa3
ACTIVE
STANDBY
Precharge
Standby
Power
Down
Mode
Exit
Precharge
Command
Read
Command
Bank A
Activate
Command
Bank A
Power Down
Mode Entry
Command
Clock Mask
Start
Clock Mask
End
Power Down
Mode Exit
Power Down
Mode Entry
* BS1=”L”, Bank C,D = Idle
Document :1G5-0177
Rev.2
Page39