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VG36641641BT 参数 Datasheet PDF下载

VG36641641BT图片预览
型号: VG36641641BT
PDF下载: 下载PDF文件 查看货源
内容描述: CMOS同步动态RAM [CMOS Synchronous Dynamic RAM]
分类和应用:
文件页数/大小: 70 页 / 973 K
品牌: VML [ VANGUARD INTERNATIONAL SEMICONDUCTOR ]
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VIS
Preliminary
VG36641641BT
CMOS Synchronous Dynamic RAM
DC Characteristics (Recommended Operating Conditions unless otherwise noted)
VG36641641B
Parameter
Symbol
Test Conditions
-7
-8
Unit
Min Max Min Max
CL = 3
130
130
mA
Operating current
I
CC1
Burst length = 1
One bank active
CL = 2
130
130
t
RC
t
RC(MIN.)
, Io = 0mA
Precharge standby
I
CC
2P CKE
V
IH(MAX.)
t
CK
= 10ns
current in power
I
CC
2PS CKE
V
down mode
IH(MAX.)
t
CK
=
Precharge standby current I
CC
2N CKE
V
IH(MIN.)
t
CK
= 10ns.
CKE
in Nonpower down mode
CS
CKE
V
IH(MIN.)
Input signals are changed one
time during 2 CLK cycles.
I
CC
2NS
CKE
V
CKE
V
, tCK =
CLK
V
IL(MAX.)
Input signals are stable.
CKE
IH(MIN.)
Notes
1
2
2
25
2
2
25
mA
mA
7
7
Active standby current in
power down mode
Active standby current in
Nonpower down mode
I
CC
3P
V
IL(MAX.)
, t
CK
= 10ns
7
5
40
7
5
40
mA
I
CC
3PS CKE
I
CC
3N
V
IL(MAX.)
, t
CK
=
CKE
V
IH(MAX.)
, t
CK
= 10ns
CKE
CS
CKE
V
IH(MIN.)
Input signals are changed
one time during 2CLKs.
mA
I
CC
3NS CKE
CKE
V
IH(MIN.)
t
CK
=
CLE
V
IL(MAX.)
Input signals are stable.
t
CK(MIN.)
, Io = 0mA
V
CL = 3
CL = 2
20
20
Operating current
(Burst mode)
Refresh current
Self refresh current
Input leakage current
Output leakage current
Output Low Voltage
Output High Voltage
I
CC4
I
CC5
I
CC6
I
LI
I
LO
V
OL
V
OH
t
CK
CKE
t
RC
All banks Active
170
135
220
1
-5
-5
5
5
0.4
2.4
2.4
-5
-5
170
120
200
1
5
5
0.4
mA
mA
mA
µA
µA
mA
mA
2
3
t
RC(MIN.)
CKE
0.2V
V
IN
0,
CKE
V
V
IN
V
DD
+ 0.3V
Pins not under test = 0V
V
OUT
V
V
OUT
V
DD (MAX)
CKE
0,
DQ# in H - Z., Dout disabled
I
OL
= 2mA
I
OH
= -2mA
4
4
Notes:
1. ICC1 depends on output loading and cycle rates. Specified values are obtained with the output
open. In addition to this, ICC1 is measured on condition that addresses are changed only one
time during t
CK(MIN.)
.
2. ICC4 depends on output loading and cycle rates. Specified values are obtained with the output
open. In addition to this, ICC4 is measured on condition that addresses are changed only one
time during t
CK(MIN.)
.
3. ICC5 is measured on condition that addresses are changed only one time during t
CK(MIN.)
.
4. For LVTTL compatible, VG36648041.
Document : 1G5-0127
Rev2
Page 5