128Mb Synchronous DRAM
P2V28S20ATP-7,-75,-8 (4-BANK x 8,388,608-WORD x 4-BIT)
P2V28S30ATP-7,-75,-8 (4-BANK x 4,194,304-WORD x 8-BIT)
P2V28S40ATP-7,-75,-8 (4-BANK x 2,097,152-WORD x 16-BIT)
FUNCTION TRUTH TABLE for CKE
CKE CKE
Current State
/CS /RAS /CAS /WE Add Action
n-1
n
H
X
X
H
L
X
X
H
H
H
L
X
X
H
H
L
X
X
H
L
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
INVALID
SELF-
REFRESH*1
L
L
L
L
L
L
H
L
L
H
H
H
H
H
H
H
L
H
H
L
L
H
H
H
H
H
L
X
H
L
H
L
L
L
L
L
L
X
H
L
H
L
Exit Self-Refresh (Idle after tRC)
Exit Self-Refresh (Idle after tRC)
L
ILLEGAL
L
X
X
X
X
X
X
X
H
X
H
L
ILLEGAL
L
X
X
X
X
X
X
L
ILLEGAL
X
X
X
X
X
L
X
X
X
X
X
L
NOP (Maintain Self-Refresh)
POWER
DOWN
INVALID
Exit Power Down to Idle
NOP (Maintain Power Down)
Refer to Function Truth Table
Enter Self-Refresh
ALL BANKS
IDLE*2
H
L
X
H
H
H
L
X
H
H
L
Enter Power Down
Enter Power Down
L
ILLEGAL
L
X
X
X
X
X
X
X
ILLEGAL
L
X
X
X
X
X
X
ILLEGAL
X
X
X
X
X
X
X
X
X
X
Refer to Current State =Power Down
Refer to Function Truth Table
Begin CLK Susspend at Next Cycle*3
Exit CLK Susspend at Next Cycle*3
Maintain CLK Suspend
ANY STATE
other than
listed above
ABBREVIATIONS:
H=High Level, L=Low Level, X=Don't Care
NOTES:
1. CKE Low to High transition will re-enable CLK and other inputs asynchronously. A minimum
setup time must be satisfied before any command other than EXIT.
2. Power-Down and Self-Refresh can be entered only from the All Banks Idle State.
3. Must be legal command.
JULY.2000
Rev.2.2
Page-13
VML [ VANGUARD INTERNATIONAL SEMICONDUCTOR ]
