VITESSE
SEMICONDUCTOR CORPORATION
Data Sheet
2.5Gb/s 16-Bit
VSC8061/VSC8062
Multiplexer/Demultiplexer Chipset
Table 8: VSC8062 Pin Identifications
Pin Number
QH Package
Pin Number
F Package
Signal
Name
I/O
Level
Description
48
47
44
45
21
20
17
19
CLK
CLKN
DI
I
I
I
I
HS
HS
HS
HS
High-speed clock, true(1)
High-speed clock, complement(1)
Serial data input, true(1)
DIN
Serial data input, complement(1)
Parallel data clock (high-speed clock divide-by-
16), true
31
30
8
6
CLK16
O
O
ECL
ECL
Parallel data clock (high-speed clock divide-by-
16), complement
CLK16N
3, 5, 31, 32,
34, 35, 39-42,
44, 45, 47, 48,
50, 51
8-11, 15-20,
22-25, 28, 29
D[0:15]
O
ECL
Parallel data outputs
1, 12, 27,
39, 51
4, 10, 18, 30,
36, 43, 49
VCC
VTT
VEE
Pwr
Pwr
Pwr
Most positive power supply
DCFL negative power supply
SCFL negative power supply
2, 5, 13, 14, 21,
26, 35
7, 46
33
36, 42, 43,
46, 49
1, 2, 9, 11-16,
22, 24-27, 37,
38, 52
3, 6, 32-34, 37,
38, 40, 41, 50
NC
Do not connect, leave open
Test inputs. Used in factory for testing, connect
to VTT through a resistor
4, 7
52
28, 29
23
Test
Pwr
Pwr
VEE*
Heat sink bias, connect to VEE
NOTE: (1) Can be used single-ended.
G52069-0, Rev 4.3
05/11/01
Page 13
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