VITESSE
SEMICONDUCTOR CORPORATION
Data Sheet
2.5Gb/s 16-Bit
Multiplexer/Demultiplexer Chipset
VSC8061/VSC8062
Table 7: VSC8061 Pin Identifications
Pin Number
QH Package
Pin number
F Package
Signal
Name
I/O
Level
Description
38
37
9
13
12
34
35
9
CLK
CLKN
I
I
HS
HS
High-speed clock true(1)
High-speed clock, complement (1)
Data clock true(1)
DCLK
I
ECL
ECL
ECL
ECL
10
34
33
DCLKN
CLK16
CLK16N
I
Data Clock complement(1)
O
O
Clock divide-by-16, true
8
Clock divide-by-16, complement
1-3, 5, 6,
8-42, 44, 45,
47, 48, 50, 51
11, 15-20, 22-
25, 28-32
D[0:15]
I
ECL
Parallel data inputs
45
44
7
19
17
31
32
DO
DON
U
O
O
O
O
HS
HS
Serial data output, true
Serial data output, complement
Phase detector output - up frequency
Phase detector output - down frequency
ECL
ECL
8
D
1, 12, 27,
39, 51
4, 10, 18, 30,
36, 43, 49
VCC
VTT
VEE
Pwr
Pwr
Pwr
Most positive power supply
DCFL negative power supply
SCFL negative power supply
2, 5, 13, 14, 21,
26, 35
7,46
33
36, 42, 43,
46, 49
11, 14-16,
20-22, 24-26,
29, 37, 52
6, 40, 41, 47,
48, 50
NC
Do not connect, leave open
Test inputs. Used in factory for testing, connect to
VTT through a resistor
3, 4
52
27, 28
23
Test
VEE
Pwr
Heat sink bias, connect to VEE
NOTE: (1) Can be used single-ended.
© VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012
Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com
Internet: www.vitesse.com
Page 12
G52069-0, Rev 4.3
05/11/01