VITESSE
SEMICONDUCTOR CORPORATION
SONET/SDH 3.125Gb/s
Laser Diode Driver with Automatic Power Control
Preliminary Data Sheet
VSC7940
Detailed Description
The VSC7940 is a high-speed laser driver with Automatic Power Control. The device is designed to operate
up to 3.125Gb/s with a 5V supply. The data and clock inputs support PECL inputs as well as other inputs that
meet the common-mode voltage and differential voltage swing specifications. The differential pair output stage
is capable of sinking up to 100mA into the laser with typical rise and fall times of 60ps. The VSC7940 is
designed to be DC-coupled. The key features of the VSC7940 are its Automatic Power Control, low power sup-
ply current, and fast rise and fall times. The VSC7938 and VSC7939 are similar Vitesse laser drivers designed
for 60mA maximum output modulation currents. These laser drivers may be powered from a 3.3V or 5V supply
and may be AC- or DC-coupled to the laser diode. The VSC7939 is available in the same 32-pin TQFP package
as the VSC7940. The VSC7938 is available in a 48-pin TQFP package.
Automatic Power Control
To ensure constant average optical power, the VSC7940 utilizes an Automatic Power Control (APC) loop.
A photodiode mounted in the laser package provides optical feedback to compensate for changes in average
laser output power due to changes that affect laser performance such as temperature and laser lifetime. The laser
bias current is adjusted by the APC loop according to the reference current set at APCSET by an external resis-
tor. An external capacitor at CAPC controls the time constant for the APC feedback loop. The recommended
value for CAPC is 0.1
µ
F. This value reduces pattern-dependent jitter associated with the APC feedback loop
and guarantees stability. Because the APC loop noise is internally filtered, APCFILT is not internally connected
and does not need to be connected to any external components. The device’s performance will not be affected if
a capacitor is connected to APCFILT. If the APC loop cannot adjust the bias current to track the desired monitor
current, FAIL is set low.
The device may be operated with or without APC. To utilize APC, a capacitor must be connected at CAPC
(0.1
µ
F) and a resistor must be connected at APCSET to set the average optical power. For open-loop operation
(no APC), a 100k
Ω
resistor should be connected between APCSET and GND. CAPC has no effect on open-
loop operation. In both modes of operation, resistors to ground should be placed at BIASMAX and MODSET to
set the bias and modulation currents.
Data Retiming
The VSC7940 provides inputs for differential PECL clock signals for data retiming to minimize jitter at
high speeds. To incorporate this function, LATCH should be connected to V
CC
. If this function is unused,
CLK+ should be connected to V
CC
, CLK- should be left unconnected, and LATCH should be connected to
GND.
Short-Circuit Protection
If BIASMAX or MODSET are shorted to ground, the output modulation and bias currents will be turned
off.
Modulation and Bias Current Monitors
The VSC7940 provides monitoring of the modulation and bias currents vias BIASMON and MODMON.
These pins sink a current proportional to the actual modulation and bias currents. MODMON sinks approxi-
mately 1/29th of the amount of modulation current and BIASMON sink approximately 1/37th of the amount of
the bias current. These pins should be tied through a pull-up resistor to V
CC
. The resistors must be chosen such
that the voltage at MODMON is greater than V
CC
- 1.0V and the voltage at BIASMON is greater than V
CC
-
1.6V.
Page 8
©
VITESSE
SEMICONDUCTOR CORPORATION
• 741 Calle Plano • Camarillo, CA 93012
Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com
Internet: www.vitesse.com
G52357-0, Rev 3.2
05/11/01
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
