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VSC7111XJW 参数 Datasheet PDF下载

VSC7111XJW图片预览
型号: VSC7111XJW
PDF下载: 下载PDF文件 查看货源
内容描述: [Telecom IC, PQCC32,]
分类和应用:
文件页数/大小: 55 页 / 894 K
品牌: VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
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Advance Product Information  
Subject to Change  
VSC7111 Datasheet  
Electrical Specifications  
4.2.2  
High-Speed Data Outputs  
The following table lists the AC characteristics of the high-speed outputs Y and YN.  
Table 55.  
AC Characteristics, High-Speed Outputs  
Parameter  
Symbol Minimum Typical Maximum Unit Condition  
Serial NRZ output  
data rate  
DRY  
0
11.5  
Gbps Minimum data rate  
will be limited by the  
AC-couplingcapacitor  
value (if AC-coupled)  
Additive random  
jitter  
< 1  
ps  
RMS  
INPLOW_PWR = 10  
ODHIGHPOWER = 01  
ODBOOST = 1  
Duty cycle  
distortion  
DC  
40  
50  
30  
60  
40  
%
ps  
Only applies to  
101010 input data  
patterns.  
Rise time and fall  
time  
t
R_Y, tF_Y  
20% to 80% with  
INPLOW_PWR = 10  
ODHIGHPOWER = 01  
ODBOOST = 1  
4.2.3  
Two-Wire Serial Interface  
The following table and illustration show the AC characteristics for the two-wire serial  
interface.  
Table 56.  
AC Characteristics, Two-Wire Serial Interface  
Parameter  
Serial clock  
Serial I/O  
Symbol Minimum Maximum Unit  
fSCK  
fSDA  
400  
400  
kHz  
kHz  
µs  
Hold time START condition after this  
period, the first CLK pulse is generated  
tHD;STA  
0.6  
Low period of SCK  
tLOW  
tHIGH  
tHD;DAT  
tSU;DAT  
tSU;STO  
tBUF  
1.3  
0.6  
µs  
µs  
µs  
ns  
µs  
µs  
pF  
High period of SCK  
Data hold time  
0.09  
100  
0.6  
Data setup time  
Setup time for STOP condition  
Bus free time between STOP and START  
Capacitive load for each bus line  
1.3  
CB  
Revision 2.0  
September 2010  
Confidential  
Page 47