VITESSE
SEMICONDUCTOR CORPORATION
Advance Product Information
125MHz Octal Deskew
VSC6280/81/82
Figure 3: VSC6282 Block Diagram - 1 In and 8 Out: Fan Out Mode
Variable Delay Element
S
11
Q
Q
OUT 0
OUT 1
R
Variable Delay Element
11
IN 0
Variable Delay Element
11
S
R
Variable Delay Element
11
Variable Delay Element
S
11
Q
OUT 7
R
Variable Delay Element
11
1
11
Serial
Data In
11-bit Shift Reg.
Delay Registers 1:16
Data
Clock
Reference
Clock
Stability
Control
One input channel fanned out to eight output channels. Delays both
edges of a pulse. Delay adjustment of edges is independent.
Page 4
VITESSE SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
G52153-0, Rev. 2.2
8/5/98