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Datasheet
Block Diagrams
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High-Level Functional Block Diagram
DRIVE
SENSE
Input Signal Equalization (ISE) and
Registers Scanning
A[39:0]
Output Level Control
and Registers Scanning
Switch Core
Y[39:0]
Switch Configuration Register
User INIT Register
Secondary Access Port
SEC_CSB
Staging Register
SEC_SDIN
SEC_WRITE
SEC_READ
RESETB
Programming Interface
SEC_SCLK
SEC_SDOUT
ADDR_DATA
CONFIG
INITB
PARALLEL_SERIALB
CSB
WRB
RDB
ALE
PRBS_OUT
Temperature
Alarm
Over Temperature
PRBS
Generator/
Detector
PRBS_ERRDET
PRBS_IN
PRBS_CLK
Figure 1. High-Level Functional Block Diagram
2 of 44
G52414 Revision 4.2
March 8, 2006
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
