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VS8061FI 参数 Datasheet PDF下载

VS8061FI图片预览
型号: VS8061FI
PDF下载: 下载PDF文件 查看货源
内容描述: [Telecom Circuit, 1-Func, GAAS, CQFP52, HEAT SINK, CERAMIC, LDCC-52]
分类和应用: ATM异步传输模式
文件页数/大小: 20 页 / 408 K
品牌: VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
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VITESSE  
SEMICONDUCTOR CORPORATION  
Datasheet  
2.5 Gb/s 16-Bit Multiplexer/  
Demultiplexer Chipset  
VSC8061/VSC8062  
Coupling for Inputs  
Figure 7: AC-Coupling for DCLK, DCLKN Inputs  
Chip Boundary  
VCC = GND  
DCLK  
ZO  
CIN  
-1.32V  
-1.32V  
RT = ZO  
R| | = 1kΩ  
VTT  
DCLKN  
CSE  
VTT  
VTT = -2V  
CIN TYP = 0.1µF  
CSE TYP = 0.1µF for single ended applications. (Capacitor values are  
selected for DCLK = 155 Mb/s.)  
DCLK, DCLKN Inputs  
Internal biasing will position the reference voltage of approximately -1.32V on both the true and comple-  
ment inputs. This input can either be DC-coupled or AC-coupled; it can also be driven single-ended or differen-  
tially. Figure 7 shows the configuration for a single-ended, AC-coupling operation. In the case of direct  
coupling and single-ended input, it is recommended that a stable VREF for ECL levels be used for the comple-  
mentary input.  
High Speed Clock and Serial Data Inputs  
It is recommended that all high speed clock and serial data inputs (i.e. CLK/CLKN for the VS8061; DI/DIN  
and CLK/CLKN for the VS8062) be AC-coupled. Figure 8 shows the configuration for a single-ended AC-cou-  
pling operation.  
In most situations these inputs will have high transition density and little DC offset. However, in cases  
where this does not hold, direct DC connection is possible. The following is to assist in this application.  
All serial data and clock inputs have the same circuit topology, as shown in figure 8. The reference voltage  
is created by a resistor divider as shown. If the input signal is driven differentially and DC-coupled to the part,  
the mid-point of the input signal swing should be centered about this reference voltage and not exceed the max-  
imum allowable amplitude. For single-ended, DC-coupling operations, it is recommended that the user provides  
an external reference voltage which has better temperature and power supply noise rejection than the on-chip  
Page 8  
VITESSE SEMICONDUCTOR CORPORATION  
G52069-0, Rev. 4.1  
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896  
6/22/99  
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