DG535/536
Vishay Siliconix
SPECIFICATIONS
a
Test Conditions
Unless Otherwise Specified
V+ = 15 V, ST, CS = 10.5 V
Parameter
Analog Switch
Analog Signal Range
e
Drain-Source
On-Resistance
Resistance Match
Source Off Leakage Current
Drain On Leakage Current
Disable Output
Digital Control
Input Voltage High
Input Voltage Low
Address Input Current
Address Input Capacitance
Dynamic Characteristics
PLCC
On State Input Capacitance
e
C
S(on)
V
D
= V
S
= 3 V
Cerquad
DIP
PLCC
Off State Input Capacitance
e
C
S(off)
V
S
= 3 V
Cerquad
DIP
Off State Output
Capacitance
e
Multiplexer Switching Time
Break-Before-Make Interval
EN, CS, CS, ST, t
ON
EN, CS, CS, ST, t
OFF
Charge Injection
Single-Channel Crosstalk
PLCC
C
D(off)
t
TRANS
t
OPEN
t
ON
t
OFF
Q
X
TALK(SC)
V
D
= 3 V
Cerquad
DIP
See Figure 4
See Figure 2 and 3
See Figure 2
See Figure 5
R
IN
= 75
Ω,
R
L
= 75
Ω
f = 5 MHz
See Figure 9
R
IN
= R
L
= 75
Ω,
f = 5 MHz
EN = 4.5 V
See Figure 8
R
IN
= 10
Ω,
R
L
= 10 kΩ
f = 5 MHz
See Figure 10
R
IN
= 10
Ω,
R
L
= 10 kΩ
f = 5 MHz
See Figure 7
PLCC
Cerquad
DIP
PLCC
Cerquad
DIP
PLCC
Cerquad
DIP
PLCC
Cerquad
DIP
Room
Room
Room
Room
Room
Room
Room
Room
Room
Full
Full
Full
Full
Room
Room
Room
Room
Room
Room
Room
Room
Room
Room
Room
Room
Room
Room
- 35
- 100
- 93
- 60
- 85
- 84
- 60
- 92
- 87
- 72
- 74
- 74
- 60
500
MHz
- 60
- 60
dB
25
300
150
32
35
40
2
5
3
8
12
9
300
25
300
150
pC
ns
300
20
20
55
8
55
8
pF
45
45
V
AIH
V
AIL
I
AI
C
A
V
A
= GND or V+
Full
Full
Room
Full
Full
< 0.01
5
10.5
-1
- 100
4.5
1
100
10.5
-1
- 100
4.5
1
100
V
µA
pF
Symbol
V
ANALOG
r
DS(on)
Δr
DS(on)
I
S(off)
I
D(on)
R
DISABLE
I
S
= - 1 mA, V
D
= 3 V, EN = 10.5 V
Sequence Each Switch On
V
S
= 3 V, V
D
= 0 V, EN = 4.5 V
V
S
= V
D
= 3 V, EN = 10.5 V
I
DISABLE
= 1 mA, EN = 10.5 V
CS = 4.5 V, V
A
= 4.5 or 10.5 V
f
Temp
b
Full
Room
Full
Room
Room
Full
Room
Full
Room
Full
55
Typ
c
A Suffix
- 55 to 125 °C
Min
c
0
Max
c
10
90
120
9
10
100
10
1000
200
250
D Suffix
- 40 to 85 °C
Min
c
0
Max
c
10
90
120
9
10
100
- 10
- 100
200
250
Unit
V
Ω
- 10
- 100
- 10
- 1000
100
- 10
- 100
- 10
- 100
nA
Ω
Chip Disabled Crosstalk
X
TALK(CD)
Adjacent Input Crosstalk
X
TALK(AI)
All Hostile Crosstalk
Bandwidth
e
X
TALK(AH)
BW
R
L
= 50
Ω,
See Figure 6
Document Number: 70070
S-71241–Rev. E, 25-Jun-07
www.vishay.com
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