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PI2121-00-LGIZ 参数 Datasheet PDF下载

PI2121-00-LGIZ图片预览
型号: PI2121-00-LGIZ
PDF下载: 下载PDF文件 查看货源
内容描述: 8伏特, 24安培全功能有源或门方案 [8 Volt, 24 Amp Full-Function Active ORing Solution]
分类和应用:
文件页数/大小: 21 页 / 1279 K
品牌: VICOR [ VICOR CORPORATION ]
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Forward Voltage Comparator: FWD  
condition when VC is lower than the VC Under-  
Voltage Threshold  
The FWD comparator detects when a forward  
current condition exists and SP is 6mV positive with  
respect to SN. When SP-SN is less than 6mV, the  
FWD comparator will assert the Fault flag to report a  
fault condition indicative of a light load “load not  
present” condition or possible shorted MOSFET.  
UV:  
The Under-Voltage (UV) input trip point can be  
programmed through an external resistor divider to  
monitor the input voltage. The UV comparator  
initiates a fault condition and pulls the FT pin low,  
when UV falls below the Under-Voltage Falling  
Threshold. If the PI2121 is configured in a floating  
application, where the GND pin is connected to the  
input voltage, the UV pin cannot detect the input  
voltage. In this case, the UV pin should be disabled  
by connecting it to the VC pin.  
Forward Over Current Comparator: FOC  
The FOC comparator indicates an excessive forward  
current condition when SP is 66mV (typical) higher  
than SN. When the FET is in the on-state and SP-  
SN is higher than 66mV (typical) the PI2121 will  
initiate a fault condition via the FT pin.  
OV:  
Slave:  
The Over-Voltage (OV) input trip point can be  
programmed through an external resistor divider to  
monitor the input voltage. The OV comparator  
In high current applications that exceed the single  
PI2121 current handling capability, multiple PI2121’s  
can be paralleled and synchronized by using the  
slave function.  
initiates a fault condition and pulls the FT pin low  
when OV rises above the Over-Voltage Rising  
Threshold. If the PI2121 is configured in a floating  
application, where the GND pin is connected to the  
input voltage, the OV pin cannot detect the input  
voltage. In this case, the OV pin should be disabled  
by connecting it to the controller GND pin.  
The Slave function synchronizes multiple PI2121’s  
together and allows for localized control of each  
paralleled MOSFET. One PI2121 will be designated  
as the master and it will control the response of the  
slaved PI2121’s.  
When the PI2121 is configured in the “Master Mode”  
Over-Temperature Detection:  
by connecting the BK to ground, the  
output having the same signal characteristics as the  
internal Gate Driver. In this configuration, the  
will be an  
SL  
The internal Over-Temperature block monitors the  
junction temperature of the controller. The over-  
temperature threshold is set to 160°C with -10°C of  
hysteresis.  
When the controller temperature  
output is capable of driving up to ten PI2121’s,  
SL  
configured in “Slave Mode”, through their  
corresponding pins. Logic high for the pin is  
exceeds this threshold, the over-temperature circuit  
initiates a fault condition and pulls the  
pin low.  
FT  
SL  
limited to 5.5V (max).  
SL  
Fault:  
The fault circuit output is an open collector with 40μs  
When the BK pin is tied to VC, the PI2121 becomes  
a slave and the pin will be an input. The  
internal Gate driver section and reverse current  
section are the only active circuits in the slaved  
PI2121 while the master performs the diagnostics  
and gate drive control.  
delay to prevent any false triggering. The pin  
FT  
SL  
will be pulled low when any of the following faults  
occur:  
Reverse Current  
Forward Over-Current  
Forward Low Current  
Over-Temperature  
Input Under-Voltage  
Input Over-Voltage  
VC pin Under-Voltage  
VC and Internal Voltage Regulator:  
The PI2121 has a separate input (VC) that provides  
power to the control circuitry and the internal gate  
driver. An internal regulator clamps the VC voltage  
to 15.5V.  
A gate voltage detector prevents FOC or FWD from  
initiating a fault when the MOSFET is in an OFF  
condition.  
For high side applications, the VC input should be  
5V above the bus voltage to properly enhance the  
internal N-channel MOSFET.  
The only fault condition that initiates gate turn-off of  
the MOSFET (as well as a fault flag signal) is when  
the reverse current fault conditions are met. All other  
fault conditions issue only a fault flag signal via the  
The internal regulator circuit has a comparator to  
monitor the VC voltage and initiates a FAULT  
Picor Corporation • picorpower.com  
PI2121  
Rev. 1.0 Page 7 of 21