CHA2190-99F/00 参数 Datasheet PDF下载

CHA2190

Chip Biasing options

20-30GHz Low Noise Amplifier

Internal DC schematic

This chip is self-biased, and flexibility is provided by the access to positive Vg.

The internal DC electrical schematic is given in order to use these pads in a safe way.

Absolute recommandations:

N°1 : Do not exceed Vds = 3.5 Volt ( Vds: internal Drain to Source voltage ).

N°2 : Do not bias in such a way that Vgs* becomes positive. (Vgs :internal Gate to Source voltage )

Typical biasing table and Typical results in test Jig at 40 GHz

40GHz IN TEST Jig

Standard

Low Noise High linearity

Low noise /low current consumption

Switch off

Vds ( V) Vg1 (V)

4

4.5

4

3.5

NC

NC

NC

-1

Vg2 (V)

NC

1

-1

-8

Id (mA)

50

60

40

0

Typical NF(dB) Typical Gain (dB) Typical P-1dB (dB) Typical Psat (dB)

2.2

2.2

2.2

X

15

15

15

X

11

12

9.5

X

13

14

12

X

Ref :

DSCHA21902036 -05-Feb.-02-

8/9

Specifications subject to change without notice

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