UM61512A
AC Test Conditions
Input Pulse Levels
0V to 3.0V
Input Rise and Fall Time
Input and Output Timing Reference Levels
Output Load
5 ns
1.5V
See Figures 1 and 2
+5V
+5V
480W
480W
I/O
I/O
30pF*
5pF*
255W
255W
* Including scope and jig.
* Including scope and jig.
Figure 1.Output Load
Figure 2. Output Load for tCLZ1,
tCLZ2, tOLZ, tCHZ1, tCHZ2,
tOHZ, tWHZ, and tOW
Data Retention Characteristics (TA = 0°C to 70°C)
Symbol
Parameter
Min.
Max.
Unit
Conditions
VDR1
3
5.25
V
CE1 ³ VCC - 0.2V
CE2 ³ VCC - 0.2V or
CE2 £ 0.2V
VCC for Data Retention
VDR2
3
-
5.25
5
V
CE2 £ 0.2V
CE1 ³ VCC - 0.2V or
CE1 £ 0.2V
ICCDR1
mA
VCC = 3.0V
CE1 ³ VCC - 0.2V
CE2 ³ VCC - 0.2V
VIN ³ VCC - 0.2V or
VIN £ 0.2V
Data Retention Current
ICCDR2
-
5
mA
VCC = 3.0V
CE2 £ 0.2V
CE1 £ 0.2V
VIN ³ VCC - 0.2V or
VIN £ 0.2V
tCDR
tR
Chip Disable to Data Retention
Time
0
5
-
-
ns
See Retention Waveform
Operation Recovery Time
ms
10
UMC [ UMC CORPORATION ]
