QPD1025
1500 W, 65 V, 1.0 – 1.1 GHz, GaN RF Input-Matched Transistor
1.0 – 1.1 GHz Application Circuit - Schematic
Bias-up Procedure
1. Set VG to -5 V.
Bias-down Procedure
1. Turn off RF signal.
2. Set ID current limit to 4 A.
3. Apply 65 V VD.
4. Slowly adjust VG until ID is set to 1.5 A.
5. Apply RF.
2. Turn off VD
3. Wait 2 seconds to allow drain capacitor to discharge.
4. Turn off VG
Datasheet Rev. B │ Subject to change without notice
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